-- Copyright (C) 1991-2013 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files from any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.

-- VENDOR "Altera"
-- PROGRAM "Quartus II 64-Bit"
-- VERSION "Version 13.1.0 Build 162 10/23/2013 SJ Full Version"

-- DATE "05/20/2025 17:11:37"

-- 
-- Device: Altera EP3C40F780C8 Package FBGA780
-- 

-- 
-- This VHDL file should be used for ModelSim-Altera (VHDL) only
-- 

LIBRARY ALTERA;
LIBRARY CYCLONEIII;
LIBRARY IEEE;
USE ALTERA.ALTERA_PRIMITIVES_COMPONENTS.ALL;
USE CYCLONEIII.CYCLONEIII_COMPONENTS.ALL;
USE IEEE.STD_LOGIC_1164.ALL;

ENTITY 	lab6 IS
    PORT (
	overflow : OUT std_logic;
	clk : IN std_logic;
	rst : IN std_logic;
	cin : IN std_logic;
	wr : IN std_logic;
	rd : IN std_logic;
	is_write : IN std_logic;
	btn : IN std_logic_vector(1 DOWNTO 0);
	key_row : IN std_logic_vector(3 DOWNTO 0);
	key_sel : IN std_logic_vector(1 DOWNTO 0);
	m : IN std_logic_vector(1 DOWNTO 0);
	ra : IN std_logic_vector(1 DOWNTO 0);
	remain : IN std_logic_vector(3 DOWNTO 0);
	key_col : OUT std_logic_vector(3 DOWNTO 0);
	seg : OUT std_logic_vector(7 DOWNTO 0);
	sel : OUT std_logic_vector(2 DOWNTO 0)
	);
END lab6;

-- Design Ports Information
-- overflow	=>  Location: PIN_AE8,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- key_col[3]	=>  Location: PIN_AE14,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- key_col[2]	=>  Location: PIN_AF13,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- key_col[1]	=>  Location: PIN_AD12,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- key_col[0]	=>  Location: PIN_AD11,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- seg[7]	=>  Location: PIN_M21,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- seg[6]	=>  Location: PIN_G12,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- seg[5]	=>  Location: PIN_G14,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- seg[4]	=>  Location: PIN_G15,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- seg[3]	=>  Location: PIN_G18,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- seg[2]	=>  Location: PIN_F18,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- seg[1]	=>  Location: PIN_G17,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- seg[0]	=>  Location: PIN_G16,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- sel[2]	=>  Location: PIN_G9,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- sel[1]	=>  Location: PIN_D22,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- sel[0]	=>  Location: PIN_C22,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- cin	=>  Location: PIN_AF5,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- rd	=>  Location: PIN_U8,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- key_sel[0]	=>  Location: PIN_AE3,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- key_sel[1]	=>  Location: PIN_AD4,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- clk	=>  Location: PIN_A14,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- remain[3]	=>  Location: PIN_AA8,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- m[0]	=>  Location: PIN_AF14,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- rst	=>  Location: PIN_Y27,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- m[1]	=>  Location: PIN_AH12,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- remain[1]	=>  Location: PIN_AE4,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- remain[0]	=>  Location: PIN_AC5,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- remain[2]	=>  Location: PIN_AB8,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- ra[0]	=>  Location: PIN_AG12,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- ra[1]	=>  Location: PIN_AF12,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- wr	=>  Location: PIN_AA10,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- is_write	=>  Location: PIN_AG11,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- btn[0]	=>  Location: PIN_Y28,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- btn[1]	=>  Location: PIN_J28,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- key_row[3]	=>  Location: PIN_AE11,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- key_row[1]	=>  Location: PIN_AE12,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- key_row[2]	=>  Location: PIN_AF11,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- key_row[0]	=>  Location: PIN_AE13,	 I/O Standard: 2.5 V,	 Current Strength: Default


ARCHITECTURE structure OF lab6 IS
SIGNAL gnd : std_logic := '0';
SIGNAL vcc : std_logic := '1';
SIGNAL unknown : std_logic := 'X';
SIGNAL devoe : std_logic := '1';
SIGNAL devclrn : std_logic := '1';
SIGNAL devpor : std_logic := '1';
SIGNAL ww_devoe : std_logic;
SIGNAL ww_devclrn : std_logic;
SIGNAL ww_devpor : std_logic;
SIGNAL ww_overflow : std_logic;
SIGNAL ww_clk : std_logic;
SIGNAL ww_rst : std_logic;
SIGNAL ww_cin : std_logic;
SIGNAL ww_wr : std_logic;
SIGNAL ww_rd : std_logic;
SIGNAL ww_is_write : std_logic;
SIGNAL ww_btn : std_logic_vector(1 DOWNTO 0);
SIGNAL ww_key_row : std_logic_vector(3 DOWNTO 0);
SIGNAL ww_key_sel : std_logic_vector(1 DOWNTO 0);
SIGNAL ww_m : std_logic_vector(1 DOWNTO 0);
SIGNAL ww_ra : std_logic_vector(1 DOWNTO 0);
SIGNAL ww_remain : std_logic_vector(3 DOWNTO 0);
SIGNAL ww_key_col : std_logic_vector(3 DOWNTO 0);
SIGNAL ww_seg : std_logic_vector(7 DOWNTO 0);
SIGNAL ww_sel : std_logic_vector(2 DOWNTO 0);
SIGNAL \clk~inputclkctrl_INCLK_bus\ : std_logic_vector(3 DOWNTO 0);
SIGNAL \rst~inputclkctrl_INCLK_bus\ : std_logic_vector(3 DOWNTO 0);
SIGNAL \overflow~output_o\ : std_logic;
SIGNAL \key_col[3]~output_o\ : std_logic;
SIGNAL \key_col[2]~output_o\ : std_logic;
SIGNAL \key_col[1]~output_o\ : std_logic;
SIGNAL \key_col[0]~output_o\ : std_logic;
SIGNAL \seg[7]~output_o\ : std_logic;
SIGNAL \seg[6]~output_o\ : std_logic;
SIGNAL \seg[5]~output_o\ : std_logic;
SIGNAL \seg[4]~output_o\ : std_logic;
SIGNAL \seg[3]~output_o\ : std_logic;
SIGNAL \seg[2]~output_o\ : std_logic;
SIGNAL \seg[1]~output_o\ : std_logic;
SIGNAL \seg[0]~output_o\ : std_logic;
SIGNAL \sel[2]~output_o\ : std_logic;
SIGNAL \sel[1]~output_o\ : std_logic;
SIGNAL \sel[0]~output_o\ : std_logic;
SIGNAL \key_sel[1]~input_o\ : std_logic;
SIGNAL \key_sel[0]~input_o\ : std_logic;
SIGNAL \rd~input_o\ : std_logic;
SIGNAL \clk~input_o\ : std_logic;
SIGNAL \clk~inputclkctrl_outclk\ : std_logic;
SIGNAL \m[0]~input_o\ : std_logic;
SIGNAL \key_row[2]~input_o\ : std_logic;
SIGNAL \key_row[3]~input_o\ : std_logic;
SIGNAL \regs_i|u_display|sel[0]~2_combout\ : std_logic;
SIGNAL \rst~input_o\ : std_logic;
SIGNAL \rst~inputclkctrl_outclk\ : std_logic;
SIGNAL \key_row[1]~input_o\ : std_logic;
SIGNAL \regs_i|u_key|WideOr0~1_combout\ : std_logic;
SIGNAL \regs_i|u_display|sel[1]~0_combout\ : std_logic;
SIGNAL \key_row[0]~input_o\ : std_logic;
SIGNAL \regs_i|u_key|WideOr0~0_combout\ : std_logic;
SIGNAL \regs_i|u_key|WideOr0~2_combout\ : std_logic;
SIGNAL \btn[1]~input_o\ : std_logic;
SIGNAL \btn[0]~input_o\ : std_logic;
SIGNAL \regs_i|page~0_combout\ : std_logic;
SIGNAL \regs_i|page~q\ : std_logic;
SIGNAL \is_write~input_o\ : std_logic;
SIGNAL \ra[1]~input_o\ : std_logic;
SIGNAL \m[1]~input_o\ : std_logic;
SIGNAL \regs_i|pc[7]~3_combout\ : std_logic;
SIGNAL \regs_i|u_key|WideOr1~0_combout\ : std_logic;
SIGNAL \regs_i|u_key|WideOr1~1_combout\ : std_logic;
SIGNAL \regs_i|u_key|WideOr1~2_combout\ : std_logic;
SIGNAL \regs_i|u_key|WideOr0~3_combout\ : std_logic;
SIGNAL \regs_i|u_key|WideOr1~3_combout\ : std_logic;
SIGNAL \regs_i|Decoder1~0_combout\ : std_logic;
SIGNAL \regs_i|Decoder1~1_combout\ : std_logic;
SIGNAL \regs_i|is_up~q\ : std_logic;
SIGNAL \regs_i|is_down~q\ : std_logic;
SIGNAL \regs_i|pc[7]~0_combout\ : std_logic;
SIGNAL \regs_i|pc[7]~1_combout\ : std_logic;
SIGNAL \regs_i|u_key|WideOr3~0_combout\ : std_logic;
SIGNAL \regs_i|u_key|WideOr3~1_combout\ : std_logic;
SIGNAL \regs_i|u_key|WideOr3~2_combout\ : std_logic;
SIGNAL \regs_i|Add0~0_combout\ : std_logic;
SIGNAL \regs_i|Add2~0_combout\ : std_logic;
SIGNAL \regs_i|pc~32_combout\ : std_logic;
SIGNAL \regs_i|u_key|WideOr2~0_combout\ : std_logic;
SIGNAL \regs_i|u_key|WideOr2~1_combout\ : std_logic;
SIGNAL \regs_i|u_key|WideOr2~2_combout\ : std_logic;
SIGNAL \alu_i|Mux1~2_combout\ : std_logic;
SIGNAL \remain[2]~input_o\ : std_logic;
SIGNAL \remain[1]~input_o\ : std_logic;
SIGNAL \remain[0]~input_o\ : std_logic;
SIGNAL \regs_i|r[1][1]~feeder_combout\ : std_logic;
SIGNAL \alu_i|Mux0~0_combout\ : std_logic;
SIGNAL \wr~input_o\ : std_logic;
SIGNAL \regs_i|u_key|WideOr4~0_combout\ : std_logic;
SIGNAL \regs_i|u_key|is_pressed~q\ : std_logic;
SIGNAL \regs_i|r[0][2]~1_combout\ : std_logic;
SIGNAL \ra[0]~input_o\ : std_logic;
SIGNAL \regs_i|r[1][4]~3_combout\ : std_logic;
SIGNAL \regs_i|r[0][4]~2_combout\ : std_logic;
SIGNAL \regs_i|r[1][3]~15_combout\ : std_logic;
SIGNAL \regs_i|r[1][1]~q\ : std_logic;
SIGNAL \regs_i|y~18_combout\ : std_logic;
SIGNAL \regs_i|r[3][4]~9_combout\ : std_logic;
SIGNAL \regs_i|r[3][2]~18_combout\ : std_logic;
SIGNAL \regs_i|r[3][1]~q\ : std_logic;
SIGNAL \regs_i|r[2][7]~5_combout\ : std_logic;
SIGNAL \regs_i|r[2][3]~16_combout\ : std_logic;
SIGNAL \regs_i|r[2][1]~q\ : std_logic;
SIGNAL \regs_i|y~19_combout\ : std_logic;
SIGNAL \regs_i|y~20_combout\ : std_logic;
SIGNAL \alu_i|Mux6~2_combout\ : std_logic;
SIGNAL \alu_i|Mux1~1_combout\ : std_logic;
SIGNAL \alu_i|Mux1~0_combout\ : std_logic;
SIGNAL \regs_i|r[3][2]~q\ : std_logic;
SIGNAL \regs_i|r[2][2]~q\ : std_logic;
SIGNAL \regs_i|r[0][4]~7_combout\ : std_logic;
SIGNAL \regs_i|r[0][2]~17_combout\ : std_logic;
SIGNAL \regs_i|r[0][2]~q\ : std_logic;
SIGNAL \regs_i|y~15_combout\ : std_logic;
SIGNAL \regs_i|y~16_combout\ : std_logic;
SIGNAL \regs_i|y~17_combout\ : std_logic;
SIGNAL \alu_i|Mux5~2_combout\ : std_logic;
SIGNAL \alu_i|res~2_combout\ : std_logic;
SIGNAL \regs_i|r[2][3]~feeder_combout\ : std_logic;
SIGNAL \regs_i|r[2][3]~q\ : std_logic;
SIGNAL \regs_i|r[3][3]~q\ : std_logic;
SIGNAL \regs_i|r[0][3]~q\ : std_logic;
SIGNAL \regs_i|y~12_combout\ : std_logic;
SIGNAL \regs_i|y~13_combout\ : std_logic;
SIGNAL \regs_i|y~14_combout\ : std_logic;
SIGNAL \alu_i|Mux4~2_combout\ : std_logic;
SIGNAL \alu_i|res~3_combout\ : std_logic;
SIGNAL \remain[3]~input_o\ : std_logic;
SIGNAL \regs_i|r[0][4]~feeder_combout\ : std_logic;
SIGNAL \regs_i|r[0][4]~8_combout\ : std_logic;
SIGNAL \regs_i|r[0][4]~q\ : std_logic;
SIGNAL \regs_i|r[2][4]~feeder_combout\ : std_logic;
SIGNAL \regs_i|r[2][7]~6_combout\ : std_logic;
SIGNAL \regs_i|r[2][4]~q\ : std_logic;
SIGNAL \regs_i|y~9_combout\ : std_logic;
SIGNAL \regs_i|r[3][4]~10_combout\ : std_logic;
SIGNAL \regs_i|r[3][4]~q\ : std_logic;
SIGNAL \regs_i|y~10_combout\ : std_logic;
SIGNAL \regs_i|y~11_combout\ : std_logic;
SIGNAL \alu_i|Mux3~2_combout\ : std_logic;
SIGNAL \regs_i|r~21_combout\ : std_logic;
SIGNAL \regs_i|r[3][0]~q\ : std_logic;
SIGNAL \regs_i|r[0][0]~q\ : std_logic;
SIGNAL \regs_i|r[2][0]~q\ : std_logic;
SIGNAL \regs_i|y~21_combout\ : std_logic;
SIGNAL \regs_i|r[1][0]~feeder_combout\ : std_logic;
SIGNAL \regs_i|r[1][0]~q\ : std_logic;
SIGNAL \regs_i|y~22_combout\ : std_logic;
SIGNAL \regs_i|y~23_combout\ : std_logic;
SIGNAL \regs_i|x~14_combout\ : std_logic;
SIGNAL \regs_i|x~15_combout\ : std_logic;
SIGNAL \regs_i|x[0]~feeder_combout\ : std_logic;
SIGNAL \alu_i|Add0~1\ : std_logic;
SIGNAL \alu_i|Add0~3\ : std_logic;
SIGNAL \alu_i|Add0~5\ : std_logic;
SIGNAL \alu_i|Add0~7\ : std_logic;
SIGNAL \alu_i|Add0~8_combout\ : std_logic;
SIGNAL \alu_i|Add0~6_combout\ : std_logic;
SIGNAL \alu_i|Add0~4_combout\ : std_logic;
SIGNAL \alu_i|Add0~2_combout\ : std_logic;
SIGNAL \cin~input_o\ : std_logic;
SIGNAL \alu_i|Add0~0_combout\ : std_logic;
SIGNAL \alu_i|Add1~1\ : std_logic;
SIGNAL \alu_i|Add1~3\ : std_logic;
SIGNAL \alu_i|Add1~5\ : std_logic;
SIGNAL \alu_i|Add1~7\ : std_logic;
SIGNAL \alu_i|Add1~8_combout\ : std_logic;
SIGNAL \regs_i|r[3][6]~q\ : std_logic;
SIGNAL \regs_i|r[0][6]~q\ : std_logic;
SIGNAL \regs_i|r[2][6]~feeder_combout\ : std_logic;
SIGNAL \regs_i|r[2][6]~q\ : std_logic;
SIGNAL \regs_i|y~3_combout\ : std_logic;
SIGNAL \regs_i|y~4_combout\ : std_logic;
SIGNAL \regs_i|y~5_combout\ : std_logic;
SIGNAL \regs_i|data[6]~39_combout\ : std_logic;
SIGNAL \regs_i|data[6]~37_combout\ : std_logic;
SIGNAL \regs_i|data[6]~38_combout\ : std_logic;
SIGNAL \regs_i|data[6]~55_combout\ : std_logic;
SIGNAL \regs_i|data[6]~54_combout\ : std_logic;
SIGNAL \regs_i|r[2][5]~feeder_combout\ : std_logic;
SIGNAL \regs_i|r[2][5]~q\ : std_logic;
SIGNAL \regs_i|r[3][5]~q\ : std_logic;
SIGNAL \regs_i|r[0][5]~q\ : std_logic;
SIGNAL \regs_i|y~6_combout\ : std_logic;
SIGNAL \regs_i|y~7_combout\ : std_logic;
SIGNAL \regs_i|y~8_combout\ : std_logic;
SIGNAL \alu_i|Add0~9\ : std_logic;
SIGNAL \alu_i|Add0~11\ : std_logic;
SIGNAL \alu_i|Add0~12_combout\ : std_logic;
SIGNAL \alu_i|Add0~10_combout\ : std_logic;
SIGNAL \alu_i|Add1~9\ : std_logic;
SIGNAL \alu_i|Add1~11\ : std_logic;
SIGNAL \alu_i|Add1~12_combout\ : std_logic;
SIGNAL \regs_i|data[6]~4_combout\ : std_logic;
SIGNAL \regs_i|r~11_combout\ : std_logic;
SIGNAL \regs_i|r[1][4]~4_combout\ : std_logic;
SIGNAL \regs_i|r[1][6]~q\ : std_logic;
SIGNAL \regs_i|x~2_combout\ : std_logic;
SIGNAL \regs_i|x~3_combout\ : std_logic;
SIGNAL \regs_i|x[6]~feeder_combout\ : std_logic;
SIGNAL \regs_i|data[5]~28_combout\ : std_logic;
SIGNAL \regs_i|data[5]~29_combout\ : std_logic;
SIGNAL \regs_i|data[5]~30_combout\ : std_logic;
SIGNAL \regs_i|data[5]~53_combout\ : std_logic;
SIGNAL \regs_i|data[5]~52_combout\ : std_logic;
SIGNAL \alu_i|Add1~10_combout\ : std_logic;
SIGNAL \regs_i|data[5]~2_combout\ : std_logic;
SIGNAL \regs_i|r~12_combout\ : std_logic;
SIGNAL \regs_i|r[1][5]~q\ : std_logic;
SIGNAL \regs_i|x~4_combout\ : std_logic;
SIGNAL \regs_i|x~5_combout\ : std_logic;
SIGNAL \regs_i|x[5]~feeder_combout\ : std_logic;
SIGNAL \alu_i|res~0_combout\ : std_logic;
SIGNAL \alu_i|Mux3~0_combout\ : std_logic;
SIGNAL \alu_i|Mux3~1_combout\ : std_logic;
SIGNAL \regs_i|data[4]~0_combout\ : std_logic;
SIGNAL \regs_i|r~13_combout\ : std_logic;
SIGNAL \regs_i|r[1][4]~feeder_combout\ : std_logic;
SIGNAL \regs_i|r[1][4]~q\ : std_logic;
SIGNAL \regs_i|x~6_combout\ : std_logic;
SIGNAL \regs_i|x~7_combout\ : std_logic;
SIGNAL \regs_i|x[4]~feeder_combout\ : std_logic;
SIGNAL \alu_i|Mux4~0_combout\ : std_logic;
SIGNAL \alu_i|Add1~6_combout\ : std_logic;
SIGNAL \alu_i|Mux4~1_combout\ : std_logic;
SIGNAL \regs_i|data[3]~7_combout\ : std_logic;
SIGNAL \regs_i|r~14_combout\ : std_logic;
SIGNAL \regs_i|r[1][3]~feeder_combout\ : std_logic;
SIGNAL \regs_i|r[1][3]~q\ : std_logic;
SIGNAL \regs_i|x~8_combout\ : std_logic;
SIGNAL \regs_i|x~9_combout\ : std_logic;
SIGNAL \regs_i|x[3]~feeder_combout\ : std_logic;
SIGNAL \alu_i|Mux5~0_combout\ : std_logic;
SIGNAL \alu_i|Add1~4_combout\ : std_logic;
SIGNAL \alu_i|Mux5~1_combout\ : std_logic;
SIGNAL \regs_i|data[2]~5_combout\ : std_logic;
SIGNAL \regs_i|r~19_combout\ : std_logic;
SIGNAL \regs_i|r[1][2]~feeder_combout\ : std_logic;
SIGNAL \regs_i|r[1][2]~q\ : std_logic;
SIGNAL \regs_i|x~10_combout\ : std_logic;
SIGNAL \regs_i|x~11_combout\ : std_logic;
SIGNAL \regs_i|x[2]~feeder_combout\ : std_logic;
SIGNAL \alu_i|res~1_combout\ : std_logic;
SIGNAL \alu_i|Mux6~0_combout\ : std_logic;
SIGNAL \alu_i|Add1~2_combout\ : std_logic;
SIGNAL \alu_i|Mux6~1_combout\ : std_logic;
SIGNAL \regs_i|data[1]~3_combout\ : std_logic;
SIGNAL \regs_i|r~20_combout\ : std_logic;
SIGNAL \regs_i|r[0][1]~q\ : std_logic;
SIGNAL \regs_i|x~12_combout\ : std_logic;
SIGNAL \regs_i|x~13_combout\ : std_logic;
SIGNAL \regs_i|x[1]~feeder_combout\ : std_logic;
SIGNAL \alu_i|Mux7~2_combout\ : std_logic;
SIGNAL \alu_i|Mux7~3_combout\ : std_logic;
SIGNAL \alu_i|Mux7~0_combout\ : std_logic;
SIGNAL \alu_i|Add1~0_combout\ : std_logic;
SIGNAL \alu_i|Mux7~1_combout\ : std_logic;
SIGNAL \regs_i|data[0]~1_combout\ : std_logic;
SIGNAL \regs_i|pc~33_combout\ : std_logic;
SIGNAL \regs_i|pc~34_combout\ : std_logic;
SIGNAL \regs_i|always2~0_combout\ : std_logic;
SIGNAL \regs_i|pc[1]~24_combout\ : std_logic;
SIGNAL \regs_i|pc[7]~7_combout\ : std_logic;
SIGNAL \regs_i|Add1~0_combout\ : std_logic;
SIGNAL \regs_i|cnt[0]~0_combout\ : std_logic;
SIGNAL \regs_i|Add1~1\ : std_logic;
SIGNAL \regs_i|Add1~2_combout\ : std_logic;
SIGNAL \regs_i|Add1~3\ : std_logic;
SIGNAL \regs_i|Add1~4_combout\ : std_logic;
SIGNAL \regs_i|Add1~5\ : std_logic;
SIGNAL \regs_i|Add1~6_combout\ : std_logic;
SIGNAL \regs_i|Add1~7\ : std_logic;
SIGNAL \regs_i|Add1~8_combout\ : std_logic;
SIGNAL \regs_i|Equal1~4_combout\ : std_logic;
SIGNAL \regs_i|Add1~9\ : std_logic;
SIGNAL \regs_i|Add1~10_combout\ : std_logic;
SIGNAL \regs_i|cnt~5_combout\ : std_logic;
SIGNAL \regs_i|Add1~11\ : std_logic;
SIGNAL \regs_i|Add1~12_combout\ : std_logic;
SIGNAL \regs_i|Add1~13\ : std_logic;
SIGNAL \regs_i|Add1~14_combout\ : std_logic;
SIGNAL \regs_i|cnt~6_combout\ : std_logic;
SIGNAL \regs_i|Add1~15\ : std_logic;
SIGNAL \regs_i|Add1~16_combout\ : std_logic;
SIGNAL \regs_i|Equal1~3_combout\ : std_logic;
SIGNAL \regs_i|Add1~17\ : std_logic;
SIGNAL \regs_i|Add1~18_combout\ : std_logic;
SIGNAL \regs_i|cnt~2_combout\ : std_logic;
SIGNAL \regs_i|Add1~19\ : std_logic;
SIGNAL \regs_i|Add1~20_combout\ : std_logic;
SIGNAL \regs_i|cnt~1_combout\ : std_logic;
SIGNAL \regs_i|Add1~21\ : std_logic;
SIGNAL \regs_i|Add1~22_combout\ : std_logic;
SIGNAL \regs_i|Add1~23\ : std_logic;
SIGNAL \regs_i|Add1~24_combout\ : std_logic;
SIGNAL \regs_i|Add1~25\ : std_logic;
SIGNAL \regs_i|Add1~26_combout\ : std_logic;
SIGNAL \regs_i|Add1~27\ : std_logic;
SIGNAL \regs_i|Add1~28_combout\ : std_logic;
SIGNAL \regs_i|Add1~29\ : std_logic;
SIGNAL \regs_i|Add1~30_combout\ : std_logic;
SIGNAL \regs_i|cnt~4_combout\ : std_logic;
SIGNAL \regs_i|Add1~31\ : std_logic;
SIGNAL \regs_i|Add1~32_combout\ : std_logic;
SIGNAL \regs_i|cnt~3_combout\ : std_logic;
SIGNAL \regs_i|Equal1~0_combout\ : std_logic;
SIGNAL \regs_i|Equal1~1_combout\ : std_logic;
SIGNAL \regs_i|Equal1~2_combout\ : std_logic;
SIGNAL \regs_i|Equal1~5_combout\ : std_logic;
SIGNAL \regs_i|pc[7]~8_combout\ : std_logic;
SIGNAL \regs_i|pc[7]~9_combout\ : std_logic;
SIGNAL \regs_i|pc[1]~25_combout\ : std_logic;
SIGNAL \regs_i|Add2~1\ : std_logic;
SIGNAL \regs_i|Add2~2_combout\ : std_logic;
SIGNAL \regs_i|Add0~1\ : std_logic;
SIGNAL \regs_i|Add0~2_combout\ : std_logic;
SIGNAL \regs_i|pc~29_combout\ : std_logic;
SIGNAL \regs_i|pc~30_combout\ : std_logic;
SIGNAL \regs_i|pc~31_combout\ : std_logic;
SIGNAL \regs_i|Add2~3\ : std_logic;
SIGNAL \regs_i|Add2~4_combout\ : std_logic;
SIGNAL \regs_i|Add0~3\ : std_logic;
SIGNAL \regs_i|Add0~4_combout\ : std_logic;
SIGNAL \regs_i|pc~26_combout\ : std_logic;
SIGNAL \regs_i|pc~27_combout\ : std_logic;
SIGNAL \regs_i|pc~28_combout\ : std_logic;
SIGNAL \regs_i|Add2~5\ : std_logic;
SIGNAL \regs_i|Add2~6_combout\ : std_logic;
SIGNAL \regs_i|Add0~5\ : std_logic;
SIGNAL \regs_i|Add0~6_combout\ : std_logic;
SIGNAL \regs_i|pc~21_combout\ : std_logic;
SIGNAL \regs_i|pc~22_combout\ : std_logic;
SIGNAL \regs_i|pc~23_combout\ : std_logic;
SIGNAL \regs_i|Add2~7\ : std_logic;
SIGNAL \regs_i|Add2~8_combout\ : std_logic;
SIGNAL \regs_i|Add0~7\ : std_logic;
SIGNAL \regs_i|Add0~8_combout\ : std_logic;
SIGNAL \regs_i|pc~18_combout\ : std_logic;
SIGNAL \regs_i|pc~19_combout\ : std_logic;
SIGNAL \regs_i|pc~20_combout\ : std_logic;
SIGNAL \regs_i|pc[7]~10_combout\ : std_logic;
SIGNAL \regs_i|pc[7]~11_combout\ : std_logic;
SIGNAL \regs_i|Add2~9\ : std_logic;
SIGNAL \regs_i|Add2~10_combout\ : std_logic;
SIGNAL \regs_i|Add0~9\ : std_logic;
SIGNAL \regs_i|Add0~10_combout\ : std_logic;
SIGNAL \regs_i|pc~15_combout\ : std_logic;
SIGNAL \regs_i|pc~16_combout\ : std_logic;
SIGNAL \regs_i|pc~17_combout\ : std_logic;
SIGNAL \regs_i|Add0~11\ : std_logic;
SIGNAL \regs_i|Add0~12_combout\ : std_logic;
SIGNAL \regs_i|Add2~11\ : std_logic;
SIGNAL \regs_i|Add2~12_combout\ : std_logic;
SIGNAL \regs_i|pc~12_combout\ : std_logic;
SIGNAL \regs_i|pc~13_combout\ : std_logic;
SIGNAL \regs_i|pc~14_combout\ : std_logic;
SIGNAL \regs_i|Add2~13\ : std_logic;
SIGNAL \regs_i|Add2~14_combout\ : std_logic;
SIGNAL \regs_i|pc~4_combout\ : std_logic;
SIGNAL \regs_i|pc~2_combout\ : std_logic;
SIGNAL \regs_i|Add0~13\ : std_logic;
SIGNAL \regs_i|Add0~14_combout\ : std_logic;
SIGNAL \regs_i|pc~5_combout\ : std_logic;
SIGNAL \regs_i|pc~6_combout\ : std_logic;
SIGNAL \regs_i|r[2][7]~feeder_combout\ : std_logic;
SIGNAL \regs_i|r[2][7]~q\ : std_logic;
SIGNAL \regs_i|r[3][7]~q\ : std_logic;
SIGNAL \regs_i|r[1][7]~feeder_combout\ : std_logic;
SIGNAL \regs_i|r[1][7]~q\ : std_logic;
SIGNAL \regs_i|y~0_combout\ : std_logic;
SIGNAL \regs_i|y~1_combout\ : std_logic;
SIGNAL \regs_i|y~2_combout\ : std_logic;
SIGNAL \regs_i|data[7]~56_combout\ : std_logic;
SIGNAL \regs_i|data[7]~46_combout\ : std_logic;
SIGNAL \regs_i|data[7]~47_combout\ : std_logic;
SIGNAL \regs_i|data[7]~57_combout\ : std_logic;
SIGNAL \alu_i|Add0~13\ : std_logic;
SIGNAL \alu_i|Add0~14_combout\ : std_logic;
SIGNAL \alu_i|Add1~13\ : std_logic;
SIGNAL \alu_i|Add1~14_combout\ : std_logic;
SIGNAL \regs_i|data[7]~6_combout\ : std_logic;
SIGNAL \regs_i|r~0_combout\ : std_logic;
SIGNAL \regs_i|r[0][7]~q\ : std_logic;
SIGNAL \regs_i|x~0_combout\ : std_logic;
SIGNAL \regs_i|x~1_combout\ : std_logic;
SIGNAL \regs_i|x[7]~feeder_combout\ : std_logic;
SIGNAL \alu_i|Add0~15\ : std_logic;
SIGNAL \alu_i|Add0~16_combout\ : std_logic;
SIGNAL \alu_i|Add1~15\ : std_logic;
SIGNAL \alu_i|Add1~16_combout\ : std_logic;
SIGNAL \alu_i|overflow~2_combout\ : std_logic;
SIGNAL \alu_i|overflow~3_combout\ : std_logic;
SIGNAL \regs_i|u_key|Decoder0~0_combout\ : std_logic;
SIGNAL \regs_i|u_key|Decoder0~1_combout\ : std_logic;
SIGNAL \regs_i|u_key|Decoder0~2_combout\ : std_logic;
SIGNAL \regs_i|u_key|Decoder0~3_combout\ : std_logic;
SIGNAL \regs_i|en[2]~feeder_combout\ : std_logic;
SIGNAL \regs_i|u_display|sel[2]~1_combout\ : std_logic;
SIGNAL \regs_i|u_display|Mux4~0_combout\ : std_logic;
SIGNAL \regs_i|data~33_combout\ : std_logic;
SIGNAL \regs_i|u_display|Mux2~1_combout\ : std_logic;
SIGNAL \regs_i|data~34_combout\ : std_logic;
SIGNAL \regs_i|u_display|Mux2~2_combout\ : std_logic;
SIGNAL \regs_i|data~26_combout\ : std_logic;
SIGNAL \regs_i|data~27_combout\ : std_logic;
SIGNAL \regs_i|data[5]~feeder_combout\ : std_logic;
SIGNAL \regs_i|data~31_combout\ : std_logic;
SIGNAL \regs_i|data~32_combout\ : std_logic;
SIGNAL \regs_i|u_display|Mux2~0_combout\ : std_logic;
SIGNAL \regs_i|u_display|Mux2~3_combout\ : std_logic;
SIGNAL \regs_i|data[7]~feeder_combout\ : std_logic;
SIGNAL \regs_i|data~48_combout\ : std_logic;
SIGNAL \regs_i|data~49_combout\ : std_logic;
SIGNAL \regs_i|data~44_combout\ : std_logic;
SIGNAL \regs_i|data~45_combout\ : std_logic;
SIGNAL \regs_i|u_display|Mux0~0_combout\ : std_logic;
SIGNAL \regs_i|data~51_combout\ : std_logic;
SIGNAL \regs_i|data~50_combout\ : std_logic;
SIGNAL \regs_i|u_display|Mux0~1_combout\ : std_logic;
SIGNAL \regs_i|u_display|Mux0~2_combout\ : std_logic;
SIGNAL \regs_i|u_display|Mux0~3_combout\ : std_logic;
SIGNAL \regs_i|data[6]~feeder_combout\ : std_logic;
SIGNAL \regs_i|data~40_combout\ : std_logic;
SIGNAL \regs_i|data~41_combout\ : std_logic;
SIGNAL \regs_i|data~35_combout\ : std_logic;
SIGNAL \regs_i|data~36_combout\ : std_logic;
SIGNAL \regs_i|u_display|Mux1~0_combout\ : std_logic;
SIGNAL \regs_i|data[26]~feeder_combout\ : std_logic;
SIGNAL \regs_i|u_display|Mux1~1_combout\ : std_logic;
SIGNAL \regs_i|data~43_combout\ : std_logic;
SIGNAL \regs_i|data~42_combout\ : std_logic;
SIGNAL \regs_i|u_display|Mux1~2_combout\ : std_logic;
SIGNAL \regs_i|u_display|Mux1~3_combout\ : std_logic;
SIGNAL \regs_i|data~25_combout\ : std_logic;
SIGNAL \regs_i|data~24_combout\ : std_logic;
SIGNAL \regs_i|u_display|Mux3~1_combout\ : std_logic;
SIGNAL \regs_i|u_display|Mux3~2_combout\ : std_logic;
SIGNAL \regs_i|data~20_combout\ : std_logic;
SIGNAL \regs_i|data~21_combout\ : std_logic;
SIGNAL \regs_i|data~22_combout\ : std_logic;
SIGNAL \regs_i|data~23_combout\ : std_logic;
SIGNAL \regs_i|u_display|Mux3~0_combout\ : std_logic;
SIGNAL \regs_i|u_display|Mux3~3_combout\ : std_logic;
SIGNAL \regs_i|u_display|WideOr0~0_combout\ : std_logic;
SIGNAL \regs_i|u_display|seg[6]~0_combout\ : std_logic;
SIGNAL \regs_i|u_display|WideOr1~0_combout\ : std_logic;
SIGNAL \regs_i|u_display|seg[5]~1_combout\ : std_logic;
SIGNAL \regs_i|u_display|WideOr2~0_combout\ : std_logic;
SIGNAL \regs_i|u_display|seg[4]~2_combout\ : std_logic;
SIGNAL \regs_i|u_display|WideOr3~0_combout\ : std_logic;
SIGNAL \regs_i|u_display|seg[3]~3_combout\ : std_logic;
SIGNAL \regs_i|u_display|WideOr4~0_combout\ : std_logic;
SIGNAL \regs_i|u_display|seg[2]~4_combout\ : std_logic;
SIGNAL \regs_i|u_display|WideOr5~0_combout\ : std_logic;
SIGNAL \regs_i|u_display|seg[1]~5_combout\ : std_logic;
SIGNAL \regs_i|u_display|WideOr6~0_combout\ : std_logic;
SIGNAL \regs_i|u_display|seg[0]~6_combout\ : std_logic;
SIGNAL \regs_i|y\ : std_logic_vector(7 DOWNTO 0);
SIGNAL \regs_i|x\ : std_logic_vector(7 DOWNTO 0);
SIGNAL \regs_i|pc\ : std_logic_vector(7 DOWNTO 0);
SIGNAL \regs_i|en\ : std_logic_vector(7 DOWNTO 0);
SIGNAL \regs_i|data\ : std_logic_vector(31 DOWNTO 0);
SIGNAL \regs_i|cnt\ : std_logic_vector(16 DOWNTO 0);
SIGNAL \regs_i|u_key|val\ : std_logic_vector(3 DOWNTO 0);
SIGNAL \regs_i|u_display|sel\ : std_logic_vector(2 DOWNTO 0);
SIGNAL \ALT_INV_clk~inputclkctrl_outclk\ : std_logic;
SIGNAL \regs_i|ALT_INV_page~q\ : std_logic;
SIGNAL \regs_i|u_key|ALT_INV_Decoder0~3_combout\ : std_logic;
SIGNAL \regs_i|u_key|ALT_INV_Decoder0~2_combout\ : std_logic;
SIGNAL \regs_i|u_key|ALT_INV_Decoder0~1_combout\ : std_logic;

BEGIN

overflow <= ww_overflow;
ww_clk <= clk;
ww_rst <= rst;
ww_cin <= cin;
ww_wr <= wr;
ww_rd <= rd;
ww_is_write <= is_write;
ww_btn <= btn;
ww_key_row <= key_row;
ww_key_sel <= key_sel;
ww_m <= m;
ww_ra <= ra;
ww_remain <= remain;
key_col <= ww_key_col;
seg <= ww_seg;
sel <= ww_sel;
ww_devoe <= devoe;
ww_devclrn <= devclrn;
ww_devpor <= devpor;

\clk~inputclkctrl_INCLK_bus\ <= (vcc & vcc & vcc & \clk~input_o\);

\rst~inputclkctrl_INCLK_bus\ <= (vcc & vcc & vcc & \rst~input_o\);
\ALT_INV_clk~inputclkctrl_outclk\ <= NOT \clk~inputclkctrl_outclk\;
\regs_i|ALT_INV_page~q\ <= NOT \regs_i|page~q\;
\regs_i|u_key|ALT_INV_Decoder0~3_combout\ <= NOT \regs_i|u_key|Decoder0~3_combout\;
\regs_i|u_key|ALT_INV_Decoder0~2_combout\ <= NOT \regs_i|u_key|Decoder0~2_combout\;
\regs_i|u_key|ALT_INV_Decoder0~1_combout\ <= NOT \regs_i|u_key|Decoder0~1_combout\;

-- Location: IOOBUF_X5_Y0_N23
\overflow~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \alu_i|overflow~3_combout\,
	devoe => ww_devoe,
	o => \overflow~output_o\);

-- Location: IOOBUF_X34_Y0_N9
\key_col[3]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \regs_i|u_key|Decoder0~0_combout\,
	devoe => ww_devoe,
	o => \key_col[3]~output_o\);

-- Location: IOOBUF_X27_Y0_N16
\key_col[2]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \regs_i|u_key|ALT_INV_Decoder0~1_combout\,
	devoe => ww_devoe,
	o => \key_col[2]~output_o\);

-- Location: IOOBUF_X1_Y0_N9
\key_col[1]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \regs_i|u_key|ALT_INV_Decoder0~2_combout\,
	devoe => ww_devoe,
	o => \key_col[1]~output_o\);

-- Location: IOOBUF_X1_Y0_N23
\key_col[0]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \regs_i|u_key|ALT_INV_Decoder0~3_combout\,
	devoe => ww_devoe,
	o => \key_col[0]~output_o\);

-- Location: IOOBUF_X67_Y35_N2
\seg[7]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => GND,
	devoe => ww_devoe,
	o => \seg[7]~output_o\);

-- Location: IOOBUF_X11_Y43_N16
\seg[6]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \regs_i|u_display|seg[6]~0_combout\,
	devoe => ww_devoe,
	o => \seg[6]~output_o\);

-- Location: IOOBUF_X29_Y43_N23
\seg[5]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \regs_i|u_display|seg[5]~1_combout\,
	devoe => ww_devoe,
	o => \seg[5]~output_o\);

-- Location: IOOBUF_X41_Y43_N9
\seg[4]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \regs_i|u_display|seg[4]~2_combout\,
	devoe => ww_devoe,
	o => \seg[4]~output_o\);

-- Location: IOOBUF_X48_Y43_N16
\seg[3]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \regs_i|u_display|seg[3]~3_combout\,
	devoe => ww_devoe,
	o => \seg[3]~output_o\);

-- Location: IOOBUF_X54_Y43_N16
\seg[2]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \regs_i|u_display|seg[2]~4_combout\,
	devoe => ww_devoe,
	o => \seg[2]~output_o\);

-- Location: IOOBUF_X50_Y43_N23
\seg[1]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \regs_i|u_display|seg[1]~5_combout\,
	devoe => ww_devoe,
	o => \seg[1]~output_o\);

-- Location: IOOBUF_X43_Y43_N30
\seg[0]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \regs_i|u_display|seg[0]~6_combout\,
	devoe => ww_devoe,
	o => \seg[0]~output_o\);

-- Location: IOOBUF_X5_Y43_N16
\sel[2]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \regs_i|u_display|sel\(2),
	devoe => ww_devoe,
	o => \sel[2]~output_o\);

-- Location: IOOBUF_X65_Y43_N16
\sel[1]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \regs_i|u_display|sel\(1),
	devoe => ww_devoe,
	o => \sel[1]~output_o\);

-- Location: IOOBUF_X56_Y43_N30
\sel[0]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \regs_i|u_display|sel\(0),
	devoe => ww_devoe,
	o => \sel[0]~output_o\);

-- Location: IOIBUF_X0_Y4_N1
\key_sel[1]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_key_sel(1),
	o => \key_sel[1]~input_o\);

-- Location: IOIBUF_X0_Y4_N15
\key_sel[0]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_key_sel(0),
	o => \key_sel[0]~input_o\);

-- Location: IOIBUF_X0_Y5_N8
\rd~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_rd,
	o => \rd~input_o\);

-- Location: IOIBUF_X34_Y43_N15
\clk~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_clk,
	o => \clk~input_o\);

-- Location: CLKCTRL_G14
\clk~inputclkctrl\ : cycloneiii_clkctrl
-- pragma translate_off
GENERIC MAP (
	clock_type => "global clock",
	ena_register_mode => "none")
-- pragma translate_on
PORT MAP (
	inclk => \clk~inputclkctrl_INCLK_bus\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	outclk => \clk~inputclkctrl_outclk\);

-- Location: IOIBUF_X34_Y0_N1
\m[0]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_m(0),
	o => \m[0]~input_o\);

-- Location: IOIBUF_X27_Y0_N1
\key_row[2]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_key_row(2),
	o => \key_row[2]~input_o\);

-- Location: IOIBUF_X29_Y0_N8
\key_row[3]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_key_row(3),
	o => \key_row[3]~input_o\);

-- Location: LCCOMB_X30_Y16_N30
\regs_i|u_display|sel[0]~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|sel[0]~2_combout\ = !\regs_i|u_display|sel\(0)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000111100001111",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \regs_i|u_display|sel\(0),
	combout => \regs_i|u_display|sel[0]~2_combout\);

-- Location: IOIBUF_X67_Y22_N15
\rst~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_rst,
	o => \rst~input_o\);

-- Location: CLKCTRL_G9
\rst~inputclkctrl\ : cycloneiii_clkctrl
-- pragma translate_off
GENERIC MAP (
	clock_type => "global clock",
	ena_register_mode => "none")
-- pragma translate_on
PORT MAP (
	inclk => \rst~inputclkctrl_INCLK_bus\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	outclk => \rst~inputclkctrl_outclk\);

-- Location: FF_X30_Y16_N31
\regs_i|u_display|sel[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|u_display|sel[0]~2_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|u_display|sel\(0));

-- Location: IOIBUF_X29_Y0_N15
\key_row[1]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_key_row(1),
	o => \key_row[1]~input_o\);

-- Location: LCCOMB_X30_Y14_N26
\regs_i|u_key|WideOr0~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_key|WideOr0~1_combout\ = (\regs_i|u_display|sel\(0) & (\key_row[2]~input_o\ & (\key_row[3]~input_o\ $ (\key_row[1]~input_o\)))) # (!\regs_i|u_display|sel\(0) & (\key_row[3]~input_o\ & (\key_row[2]~input_o\ $ (\key_row[1]~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0010010010001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \key_row[2]~input_o\,
	datab => \key_row[3]~input_o\,
	datac => \regs_i|u_display|sel\(0),
	datad => \key_row[1]~input_o\,
	combout => \regs_i|u_key|WideOr0~1_combout\);

-- Location: LCCOMB_X30_Y16_N16
\regs_i|u_display|sel[1]~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|sel[1]~0_combout\ = \regs_i|u_display|sel\(0) $ (\regs_i|u_display|sel\(1))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|sel\(0),
	datac => \regs_i|u_display|sel\(1),
	combout => \regs_i|u_display|sel[1]~0_combout\);

-- Location: FF_X30_Y16_N17
\regs_i|u_display|sel[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|u_display|sel[1]~0_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|u_display|sel\(1));

-- Location: IOIBUF_X32_Y0_N1
\key_row[0]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_key_row(0),
	o => \key_row[0]~input_o\);

-- Location: LCCOMB_X30_Y14_N4
\regs_i|u_key|WideOr0~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_key|WideOr0~0_combout\ = (\key_row[2]~input_o\ & (!\key_row[0]~input_o\ & (\key_row[3]~input_o\ & \key_row[1]~input_o\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0010000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \key_row[2]~input_o\,
	datab => \key_row[0]~input_o\,
	datac => \key_row[3]~input_o\,
	datad => \key_row[1]~input_o\,
	combout => \regs_i|u_key|WideOr0~0_combout\);

-- Location: LCCOMB_X30_Y14_N18
\regs_i|u_key|WideOr0~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_key|WideOr0~2_combout\ = (\regs_i|u_key|WideOr0~0_combout\) # ((\regs_i|u_key|WideOr0~1_combout\ & (\regs_i|u_display|sel\(1) & \key_row[0]~input_o\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111100011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_key|WideOr0~1_combout\,
	datab => \regs_i|u_display|sel\(1),
	datac => \regs_i|u_key|WideOr0~0_combout\,
	datad => \key_row[0]~input_o\,
	combout => \regs_i|u_key|WideOr0~2_combout\);

-- Location: FF_X30_Y14_N19
\regs_i|u_key|val[3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|u_key|WideOr0~2_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|u_key|val\(3));

-- Location: IOIBUF_X67_Y22_N8
\btn[1]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_btn(1),
	o => \btn[1]~input_o\);

-- Location: IOIBUF_X67_Y22_N22
\btn[0]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_btn(0),
	o => \btn[0]~input_o\);

-- Location: LCCOMB_X26_Y16_N30
\regs_i|page~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|page~0_combout\ = (\btn[0]~input_o\ & ((\regs_i|page~q\) # (!\btn[1]~input_o\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \btn[1]~input_o\,
	datac => \regs_i|page~q\,
	datad => \btn[0]~input_o\,
	combout => \regs_i|page~0_combout\);

-- Location: FF_X26_Y16_N31
\regs_i|page\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|page~0_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|page~q\);

-- Location: IOIBUF_X29_Y0_N1
\is_write~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_is_write,
	o => \is_write~input_o\);

-- Location: IOIBUF_X25_Y0_N15
\ra[1]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_ra(1),
	o => \ra[1]~input_o\);

-- Location: IOIBUF_X22_Y0_N1
\m[1]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_m(1),
	o => \m[1]~input_o\);

-- Location: LCCOMB_X26_Y16_N6
\regs_i|pc[7]~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc[7]~3_combout\ = (\regs_i|page~q\ & (!\is_write~input_o\ & (\ra[1]~input_o\))) # (!\regs_i|page~q\ & (((!\m[1]~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0100000001001111",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \is_write~input_o\,
	datab => \ra[1]~input_o\,
	datac => \regs_i|page~q\,
	datad => \m[1]~input_o\,
	combout => \regs_i|pc[7]~3_combout\);

-- Location: LCCOMB_X30_Y14_N22
\regs_i|u_key|WideOr1~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_key|WideOr1~0_combout\ = (\regs_i|u_display|sel\(0) & ((\key_row[3]~input_o\ $ (\key_row[1]~input_o\)))) # (!\regs_i|u_display|sel\(0) & (\regs_i|u_display|sel\(1) & (!\key_row[3]~input_o\ & \key_row[1]~input_o\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000111010100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|sel\(0),
	datab => \regs_i|u_display|sel\(1),
	datac => \key_row[3]~input_o\,
	datad => \key_row[1]~input_o\,
	combout => \regs_i|u_key|WideOr1~0_combout\);

-- Location: LCCOMB_X30_Y14_N28
\regs_i|u_key|WideOr1~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_key|WideOr1~1_combout\ = (\key_row[2]~input_o\ & \key_row[0]~input_o\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010101000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \key_row[2]~input_o\,
	datad => \key_row[0]~input_o\,
	combout => \regs_i|u_key|WideOr1~1_combout\);

-- Location: LCCOMB_X30_Y14_N30
\regs_i|u_key|WideOr1~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_key|WideOr1~2_combout\ = (\key_row[2]~input_o\ & (\regs_i|u_display|sel\(1) & ((!\key_row[0]~input_o\)))) # (!\key_row[2]~input_o\ & (!\regs_i|u_display|sel\(1) & (\regs_i|u_display|sel\(0) & \key_row[0]~input_o\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0001000010001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \key_row[2]~input_o\,
	datab => \regs_i|u_display|sel\(1),
	datac => \regs_i|u_display|sel\(0),
	datad => \key_row[0]~input_o\,
	combout => \regs_i|u_key|WideOr1~2_combout\);

-- Location: LCCOMB_X30_Y14_N24
\regs_i|u_key|WideOr0~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_key|WideOr0~3_combout\ = (\key_row[3]~input_o\ & \key_row[1]~input_o\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \key_row[3]~input_o\,
	datad => \key_row[1]~input_o\,
	combout => \regs_i|u_key|WideOr0~3_combout\);

-- Location: LCCOMB_X30_Y14_N2
\regs_i|u_key|WideOr1~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_key|WideOr1~3_combout\ = (\regs_i|u_key|WideOr1~0_combout\ & ((\regs_i|u_key|WideOr1~1_combout\) # ((\regs_i|u_key|WideOr1~2_combout\ & \regs_i|u_key|WideOr0~3_combout\)))) # (!\regs_i|u_key|WideOr1~0_combout\ & 
-- (((\regs_i|u_key|WideOr1~2_combout\ & \regs_i|u_key|WideOr0~3_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111100010001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_key|WideOr1~0_combout\,
	datab => \regs_i|u_key|WideOr1~1_combout\,
	datac => \regs_i|u_key|WideOr1~2_combout\,
	datad => \regs_i|u_key|WideOr0~3_combout\,
	combout => \regs_i|u_key|WideOr1~3_combout\);

-- Location: FF_X30_Y14_N3
\regs_i|u_key|val[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|u_key|WideOr1~3_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|u_key|val\(2));

-- Location: LCCOMB_X29_Y15_N22
\regs_i|Decoder1~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Decoder1~0_combout\ = (\m[1]~input_o\ & \m[0]~input_o\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \m[1]~input_o\,
	datad => \m[0]~input_o\,
	combout => \regs_i|Decoder1~0_combout\);

-- Location: LCCOMB_X29_Y15_N0
\regs_i|Decoder1~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Decoder1~1_combout\ = (\m[1]~input_o\ & !\m[0]~input_o\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \m[1]~input_o\,
	datad => \m[0]~input_o\,
	combout => \regs_i|Decoder1~1_combout\);

-- Location: FF_X29_Y15_N1
\regs_i|is_up\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|Decoder1~1_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|ALT_INV_page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|is_up~q\);

-- Location: FF_X29_Y15_N11
\regs_i|is_down\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	asdata => \regs_i|Decoder1~0_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => VCC,
	ena => \regs_i|ALT_INV_page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|is_down~q\);

-- Location: LCCOMB_X29_Y15_N12
\regs_i|pc[7]~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc[7]~0_combout\ = (\regs_i|page~q\ & (!\regs_i|is_down~q\ & ((\is_write~input_o\) # (!\ra[1]~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000011010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ra[1]~input_o\,
	datab => \is_write~input_o\,
	datac => \regs_i|page~q\,
	datad => \regs_i|is_down~q\,
	combout => \regs_i|pc[7]~0_combout\);

-- Location: LCCOMB_X29_Y15_N8
\regs_i|pc[7]~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc[7]~1_combout\ = (\regs_i|Decoder1~0_combout\ & (\regs_i|is_up~q\ & ((\regs_i|pc[7]~0_combout\)))) # (!\regs_i|Decoder1~0_combout\ & (((\regs_i|is_up~q\ & \regs_i|pc[7]~0_combout\)) # (!\regs_i|page~q\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100110100000101",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|Decoder1~0_combout\,
	datab => \regs_i|is_up~q\,
	datac => \regs_i|page~q\,
	datad => \regs_i|pc[7]~0_combout\,
	combout => \regs_i|pc[7]~1_combout\);

-- Location: LCCOMB_X30_Y14_N20
\regs_i|u_key|WideOr3~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_key|WideOr3~0_combout\ = (\key_row[1]~input_o\ & ((\key_row[0]~input_o\ & (!\regs_i|u_display|sel\(1) & !\key_row[2]~input_o\)) # (!\key_row[0]~input_o\ & ((\key_row[2]~input_o\))))) # (!\key_row[1]~input_o\ & (((\regs_i|u_display|sel\(1)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0111001001011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \key_row[1]~input_o\,
	datab => \key_row[0]~input_o\,
	datac => \regs_i|u_display|sel\(1),
	datad => \key_row[2]~input_o\,
	combout => \regs_i|u_key|WideOr3~0_combout\);

-- Location: LCCOMB_X30_Y14_N10
\regs_i|u_key|WideOr3~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_key|WideOr3~1_combout\ = (\key_row[3]~input_o\ & ((\regs_i|u_key|WideOr3~0_combout\) # (!\regs_i|u_display|sel\(0))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000001010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|sel\(0),
	datac => \key_row[3]~input_o\,
	datad => \regs_i|u_key|WideOr3~0_combout\,
	combout => \regs_i|u_key|WideOr3~1_combout\);

-- Location: LCCOMB_X30_Y14_N6
\regs_i|u_key|WideOr3~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_key|WideOr3~2_combout\ = (\key_row[1]~input_o\ & ((\regs_i|u_display|sel\(0) & ((\regs_i|u_key|WideOr3~1_combout\))) # (!\regs_i|u_display|sel\(0) & (\regs_i|u_key|WideOr1~1_combout\ & !\regs_i|u_key|WideOr3~1_combout\)))) # 
-- (!\key_row[1]~input_o\ & (\regs_i|u_key|WideOr1~1_combout\ & ((\regs_i|u_key|WideOr3~1_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110010000001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \key_row[1]~input_o\,
	datab => \regs_i|u_key|WideOr1~1_combout\,
	datac => \regs_i|u_display|sel\(0),
	datad => \regs_i|u_key|WideOr3~1_combout\,
	combout => \regs_i|u_key|WideOr3~2_combout\);

-- Location: FF_X30_Y14_N7
\regs_i|u_key|val[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|u_key|WideOr3~2_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|u_key|val\(0));

-- Location: LCCOMB_X27_Y13_N12
\regs_i|Add0~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add0~0_combout\ = \regs_i|pc\(0) $ (VCC)
-- \regs_i|Add0~1\ = CARRY(\regs_i|pc\(0))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011001111001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|pc\(0),
	datad => VCC,
	combout => \regs_i|Add0~0_combout\,
	cout => \regs_i|Add0~1\);

-- Location: LCCOMB_X27_Y14_N6
\regs_i|Add2~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add2~0_combout\ = \regs_i|pc\(0) $ (VCC)
-- \regs_i|Add2~1\ = CARRY(\regs_i|pc\(0))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011001111001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|pc\(0),
	datad => VCC,
	combout => \regs_i|Add2~0_combout\,
	cout => \regs_i|Add2~1\);

-- Location: LCCOMB_X27_Y15_N4
\regs_i|pc~32\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~32_combout\ = (\regs_i|pc[7]~3_combout\ & (((\regs_i|pc[7]~1_combout\)))) # (!\regs_i|pc[7]~3_combout\ & ((\regs_i|pc[7]~1_combout\ & ((\regs_i|Add2~0_combout\))) # (!\regs_i|pc[7]~1_combout\ & (\regs_i|Add0~0_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010010100100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|pc[7]~3_combout\,
	datab => \regs_i|Add0~0_combout\,
	datac => \regs_i|pc[7]~1_combout\,
	datad => \regs_i|Add2~0_combout\,
	combout => \regs_i|pc~32_combout\);

-- Location: LCCOMB_X30_Y14_N12
\regs_i|u_key|WideOr2~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_key|WideOr2~0_combout\ = (\key_row[3]~input_o\ & (!\key_row[1]~input_o\ & ((\regs_i|u_display|sel\(0)) # (!\regs_i|u_display|sel\(1))))) # (!\key_row[3]~input_o\ & (((\regs_i|u_display|sel\(1) & \key_row[1]~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000110010110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|sel\(0),
	datab => \regs_i|u_display|sel\(1),
	datac => \key_row[3]~input_o\,
	datad => \key_row[1]~input_o\,
	combout => \regs_i|u_key|WideOr2~0_combout\);

-- Location: LCCOMB_X30_Y14_N14
\regs_i|u_key|WideOr2~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_key|WideOr2~1_combout\ = (!\regs_i|u_display|sel\(1) & ((\key_row[2]~input_o\ & ((!\key_row[0]~input_o\))) # (!\key_row[2]~input_o\ & (!\regs_i|u_display|sel\(0) & \key_row[0]~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000100100010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \key_row[2]~input_o\,
	datab => \regs_i|u_display|sel\(1),
	datac => \regs_i|u_display|sel\(0),
	datad => \key_row[0]~input_o\,
	combout => \regs_i|u_key|WideOr2~1_combout\);

-- Location: LCCOMB_X30_Y14_N8
\regs_i|u_key|WideOr2~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_key|WideOr2~2_combout\ = (\regs_i|u_key|WideOr2~0_combout\ & ((\regs_i|u_key|WideOr1~1_combout\) # ((\regs_i|u_key|WideOr2~1_combout\ & \regs_i|u_key|WideOr0~3_combout\)))) # (!\regs_i|u_key|WideOr2~0_combout\ & 
-- (((\regs_i|u_key|WideOr2~1_combout\ & \regs_i|u_key|WideOr0~3_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111100010001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_key|WideOr2~0_combout\,
	datab => \regs_i|u_key|WideOr1~1_combout\,
	datac => \regs_i|u_key|WideOr2~1_combout\,
	datad => \regs_i|u_key|WideOr0~3_combout\,
	combout => \regs_i|u_key|WideOr2~2_combout\);

-- Location: FF_X30_Y14_N9
\regs_i|u_key|val[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|u_key|WideOr2~2_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|u_key|val\(1));

-- Location: LCCOMB_X26_Y16_N26
\alu_i|Mux1~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Mux1~2_combout\ = (\key_sel[0]~input_o\ & !\rd~input_o\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \key_sel[0]~input_o\,
	datad => \rd~input_o\,
	combout => \alu_i|Mux1~2_combout\);

-- Location: IOIBUF_X0_Y3_N1
\remain[2]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_remain(2),
	o => \remain[2]~input_o\);

-- Location: IOIBUF_X0_Y2_N15
\remain[1]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_remain(1),
	o => \remain[1]~input_o\);

-- Location: IOIBUF_X0_Y2_N1
\remain[0]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_remain(0),
	o => \remain[0]~input_o\);

-- Location: LCCOMB_X26_Y15_N22
\regs_i|r[1][1]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[1][1]~feeder_combout\ = \regs_i|r~20_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \regs_i|r~20_combout\,
	combout => \regs_i|r[1][1]~feeder_combout\);

-- Location: LCCOMB_X28_Y14_N8
\alu_i|Mux0~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Mux0~0_combout\ = (!\key_sel[0]~input_o\ & \rd~input_o\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101010100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \key_sel[0]~input_o\,
	datad => \rd~input_o\,
	combout => \alu_i|Mux0~0_combout\);

-- Location: IOIBUF_X18_Y0_N22
\wr~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_wr,
	o => \wr~input_o\);

-- Location: LCCOMB_X30_Y14_N16
\regs_i|u_key|WideOr4~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_key|WideOr4~0_combout\ = (\key_row[2]~input_o\ & ((\key_row[0]~input_o\ & (\key_row[3]~input_o\ $ (\key_row[1]~input_o\))) # (!\key_row[0]~input_o\ & (\key_row[3]~input_o\ & \key_row[1]~input_o\)))) # (!\key_row[2]~input_o\ & 
-- (\key_row[0]~input_o\ & (\key_row[3]~input_o\ & \key_row[1]~input_o\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100010000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \key_row[2]~input_o\,
	datab => \key_row[0]~input_o\,
	datac => \key_row[3]~input_o\,
	datad => \key_row[1]~input_o\,
	combout => \regs_i|u_key|WideOr4~0_combout\);

-- Location: FF_X30_Y14_N17
\regs_i|u_key|is_pressed\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|u_key|WideOr4~0_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|u_key|is_pressed~q\);

-- Location: LCCOMB_X27_Y15_N20
\regs_i|r[0][2]~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[0][2]~1_combout\ = (\alu_i|Mux0~0_combout\ & (!\wr~input_o\ & (!\regs_i|page~q\ & \regs_i|u_key|is_pressed~q\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000001000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \alu_i|Mux0~0_combout\,
	datab => \wr~input_o\,
	datac => \regs_i|page~q\,
	datad => \regs_i|u_key|is_pressed~q\,
	combout => \regs_i|r[0][2]~1_combout\);

-- Location: IOIBUF_X34_Y0_N22
\ra[0]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_ra(0),
	o => \ra[0]~input_o\);

-- Location: LCCOMB_X27_Y15_N22
\regs_i|r[1][4]~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[1][4]~3_combout\ = (\ra[0]~input_o\ & (((!\regs_i|page~q\ & !\ra[1]~input_o\)))) # (!\ra[0]~input_o\ & (\wr~input_o\ & (\regs_i|page~q\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0100000001001010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ra[0]~input_o\,
	datab => \wr~input_o\,
	datac => \regs_i|page~q\,
	datad => \ra[1]~input_o\,
	combout => \regs_i|r[1][4]~3_combout\);

-- Location: LCCOMB_X26_Y16_N24
\regs_i|r[0][4]~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[0][4]~2_combout\ = (!\is_write~input_o\ & (!\ra[1]~input_o\ & \regs_i|page~q\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0001000000010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \is_write~input_o\,
	datab => \ra[1]~input_o\,
	datac => \regs_i|page~q\,
	combout => \regs_i|r[0][4]~2_combout\);

-- Location: LCCOMB_X26_Y15_N8
\regs_i|r[1][3]~15\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[1][3]~15_combout\ = (\regs_i|r[1][4]~3_combout\ & ((\regs_i|r[0][4]~2_combout\) # ((\regs_i|r[0][2]~1_combout\ & \key_sel[1]~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100110010000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|r[0][2]~1_combout\,
	datab => \regs_i|r[1][4]~3_combout\,
	datac => \key_sel[1]~input_o\,
	datad => \regs_i|r[0][4]~2_combout\,
	combout => \regs_i|r[1][3]~15_combout\);

-- Location: FF_X26_Y15_N23
\regs_i|r[1][1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|r[1][1]~feeder_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|r[1][3]~15_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[1][1]~q\);

-- Location: LCCOMB_X25_Y15_N22
\regs_i|y~18\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|y~18_combout\ = (\remain[1]~input_o\ & (\remain[0]~input_o\)) # (!\remain[1]~input_o\ & ((\remain[0]~input_o\ & ((\regs_i|r[1][1]~q\))) # (!\remain[0]~input_o\ & (\regs_i|r[0][1]~q\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110010011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \remain[1]~input_o\,
	datab => \remain[0]~input_o\,
	datac => \regs_i|r[0][1]~q\,
	datad => \regs_i|r[1][1]~q\,
	combout => \regs_i|y~18_combout\);

-- Location: LCCOMB_X27_Y15_N24
\regs_i|r[3][4]~9\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[3][4]~9_combout\ = (\ra[0]~input_o\ & ((\regs_i|page~q\ & (\wr~input_o\)) # (!\regs_i|page~q\ & ((\ra[1]~input_o\)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1000101010000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ra[0]~input_o\,
	datab => \wr~input_o\,
	datac => \regs_i|page~q\,
	datad => \ra[1]~input_o\,
	combout => \regs_i|r[3][4]~9_combout\);

-- Location: LCCOMB_X27_Y15_N18
\regs_i|r[3][2]~18\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[3][2]~18_combout\ = (\regs_i|r[3][4]~9_combout\ & ((\regs_i|r[0][4]~2_combout\) # ((\key_sel[1]~input_o\ & \regs_i|r[0][2]~1_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100100011000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \key_sel[1]~input_o\,
	datab => \regs_i|r[3][4]~9_combout\,
	datac => \regs_i|r[0][4]~2_combout\,
	datad => \regs_i|r[0][2]~1_combout\,
	combout => \regs_i|r[3][2]~18_combout\);

-- Location: FF_X27_Y15_N9
\regs_i|r[3][1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|r~20_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|r[3][2]~18_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[3][1]~q\);

-- Location: LCCOMB_X27_Y15_N6
\regs_i|r[2][7]~5\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[2][7]~5_combout\ = (\ra[0]~input_o\ & (!\wr~input_o\ & (\regs_i|page~q\))) # (!\ra[0]~input_o\ & (((!\regs_i|page~q\ & \ra[1]~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0010010100100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ra[0]~input_o\,
	datab => \wr~input_o\,
	datac => \regs_i|page~q\,
	datad => \ra[1]~input_o\,
	combout => \regs_i|r[2][7]~5_combout\);

-- Location: LCCOMB_X26_Y15_N30
\regs_i|r[2][3]~16\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[2][3]~16_combout\ = (\regs_i|r[2][7]~5_combout\ & ((\regs_i|r[0][4]~2_combout\) # ((\key_sel[1]~input_o\ & \regs_i|r[0][2]~1_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110110000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \key_sel[1]~input_o\,
	datab => \regs_i|r[0][4]~2_combout\,
	datac => \regs_i|r[0][2]~1_combout\,
	datad => \regs_i|r[2][7]~5_combout\,
	combout => \regs_i|r[2][3]~16_combout\);

-- Location: FF_X25_Y15_N17
\regs_i|r[2][1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	asdata => \regs_i|r~20_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => VCC,
	ena => \regs_i|r[2][3]~16_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[2][1]~q\);

-- Location: LCCOMB_X25_Y15_N28
\regs_i|y~19\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|y~19_combout\ = (\remain[1]~input_o\ & ((\regs_i|y~18_combout\ & (\regs_i|r[3][1]~q\)) # (!\regs_i|y~18_combout\ & ((\regs_i|r[2][1]~q\))))) # (!\remain[1]~input_o\ & (\regs_i|y~18_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110011011000100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \remain[1]~input_o\,
	datab => \regs_i|y~18_combout\,
	datac => \regs_i|r[3][1]~q\,
	datad => \regs_i|r[2][1]~q\,
	combout => \regs_i|y~19_combout\);

-- Location: LCCOMB_X29_Y16_N8
\regs_i|y~20\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|y~20_combout\ = (\remain[2]~input_o\ & (\regs_i|pc\(1))) # (!\remain[2]~input_o\ & ((\regs_i|y~19_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100111111000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|pc\(1),
	datac => \remain[2]~input_o\,
	datad => \regs_i|y~19_combout\,
	combout => \regs_i|y~20_combout\);

-- Location: FF_X29_Y16_N9
\regs_i|y[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|y~20_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|y\(1));

-- Location: LCCOMB_X28_Y15_N4
\alu_i|Mux6~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Mux6~2_combout\ = (\regs_i|x\(1) & ((!\regs_i|y\(1)) # (!\key_sel[1]~input_o\))) # (!\regs_i|x\(1) & ((\regs_i|y\(1))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011111111001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|x\(1),
	datac => \key_sel[1]~input_o\,
	datad => \regs_i|y\(1),
	combout => \alu_i|Mux6~2_combout\);

-- Location: LCCOMB_X27_Y13_N2
\alu_i|Mux1~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Mux1~1_combout\ = (\rd~input_o\ & ((\key_sel[1]~input_o\) # (\key_sel[0]~input_o\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \key_sel[1]~input_o\,
	datac => \key_sel[0]~input_o\,
	datad => \rd~input_o\,
	combout => \alu_i|Mux1~1_combout\);

-- Location: LCCOMB_X27_Y13_N28
\alu_i|Mux1~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Mux1~0_combout\ = (\rd~input_o\ & ((\key_sel[0]~input_o\))) # (!\rd~input_o\ & (\key_sel[1]~input_o\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000011001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \key_sel[1]~input_o\,
	datac => \key_sel[0]~input_o\,
	datad => \rd~input_o\,
	combout => \alu_i|Mux1~0_combout\);

-- Location: FF_X27_Y15_N13
\regs_i|r[3][2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|r~19_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|r[3][2]~18_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[3][2]~q\);

-- Location: FF_X25_Y15_N31
\regs_i|r[2][2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	asdata => \regs_i|r~19_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => VCC,
	ena => \regs_i|r[2][3]~16_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[2][2]~q\);

-- Location: LCCOMB_X27_Y15_N14
\regs_i|r[0][4]~7\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[0][4]~7_combout\ = (!\ra[0]~input_o\ & ((\regs_i|page~q\ & (!\wr~input_o\)) # (!\regs_i|page~q\ & ((!\ra[1]~input_o\)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0001000000010101",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ra[0]~input_o\,
	datab => \wr~input_o\,
	datac => \regs_i|page~q\,
	datad => \ra[1]~input_o\,
	combout => \regs_i|r[0][4]~7_combout\);

-- Location: LCCOMB_X26_Y15_N0
\regs_i|r[0][2]~17\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[0][2]~17_combout\ = (\regs_i|r[0][4]~7_combout\ & ((\regs_i|r[0][4]~2_combout\) # ((\key_sel[1]~input_o\ & \regs_i|r[0][2]~1_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100110010000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \key_sel[1]~input_o\,
	datab => \regs_i|r[0][4]~7_combout\,
	datac => \regs_i|r[0][2]~1_combout\,
	datad => \regs_i|r[0][4]~2_combout\,
	combout => \regs_i|r[0][2]~17_combout\);

-- Location: FF_X25_Y15_N25
\regs_i|r[0][2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	asdata => \regs_i|r~19_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => VCC,
	ena => \regs_i|r[0][2]~17_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[0][2]~q\);

-- Location: LCCOMB_X25_Y15_N24
\regs_i|y~15\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|y~15_combout\ = (\remain[0]~input_o\ & (((\remain[1]~input_o\)))) # (!\remain[0]~input_o\ & ((\remain[1]~input_o\ & (\regs_i|r[2][2]~q\)) # (!\remain[1]~input_o\ & ((\regs_i|r[0][2]~q\)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110111000110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|r[2][2]~q\,
	datab => \remain[0]~input_o\,
	datac => \regs_i|r[0][2]~q\,
	datad => \remain[1]~input_o\,
	combout => \regs_i|y~15_combout\);

-- Location: LCCOMB_X25_Y15_N14
\regs_i|y~16\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|y~16_combout\ = (\remain[0]~input_o\ & ((\regs_i|y~15_combout\ & ((\regs_i|r[3][2]~q\))) # (!\regs_i|y~15_combout\ & (\regs_i|r[1][2]~q\)))) # (!\remain[0]~input_o\ & (((\regs_i|y~15_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001110001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|r[1][2]~q\,
	datab => \remain[0]~input_o\,
	datac => \regs_i|r[3][2]~q\,
	datad => \regs_i|y~15_combout\,
	combout => \regs_i|y~16_combout\);

-- Location: LCCOMB_X28_Y16_N30
\regs_i|y~17\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|y~17_combout\ = (\remain[2]~input_o\ & (\regs_i|pc\(2))) # (!\remain[2]~input_o\ & ((\regs_i|y~16_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001111000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \remain[2]~input_o\,
	datac => \regs_i|pc\(2),
	datad => \regs_i|y~16_combout\,
	combout => \regs_i|y~17_combout\);

-- Location: FF_X28_Y16_N31
\regs_i|y[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|y~17_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|y\(2));

-- Location: LCCOMB_X28_Y15_N16
\alu_i|Mux5~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Mux5~2_combout\ = (\regs_i|x\(2) & ((!\regs_i|y\(2)) # (!\key_sel[1]~input_o\))) # (!\regs_i|x\(2) & ((\regs_i|y\(2))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0111011110101010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|x\(2),
	datab => \key_sel[1]~input_o\,
	datad => \regs_i|y\(2),
	combout => \alu_i|Mux5~2_combout\);

-- Location: LCCOMB_X28_Y15_N14
\alu_i|res~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|res~2_combout\ = (\regs_i|x\(2) & \regs_i|y\(2))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010101000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|x\(2),
	datad => \regs_i|y\(2),
	combout => \alu_i|res~2_combout\);

-- Location: LCCOMB_X29_Y15_N2
\regs_i|r[2][3]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[2][3]~feeder_combout\ = \regs_i|r~14_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \regs_i|r~14_combout\,
	combout => \regs_i|r[2][3]~feeder_combout\);

-- Location: FF_X29_Y15_N3
\regs_i|r[2][3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|r[2][3]~feeder_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|r[2][3]~16_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[2][3]~q\);

-- Location: FF_X26_Y15_N15
\regs_i|r[3][3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|r~14_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|r[3][2]~18_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[3][3]~q\);

-- Location: FF_X25_Y15_N5
\regs_i|r[0][3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	asdata => \regs_i|r~14_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => VCC,
	ena => \regs_i|r[0][2]~17_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[0][3]~q\);

-- Location: LCCOMB_X25_Y17_N2
\regs_i|y~12\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|y~12_combout\ = (\remain[1]~input_o\ & (((\remain[0]~input_o\)))) # (!\remain[1]~input_o\ & ((\remain[0]~input_o\ & (\regs_i|r[1][3]~q\)) # (!\remain[0]~input_o\ & ((\regs_i|r[0][3]~q\)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110010111100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \remain[1]~input_o\,
	datab => \regs_i|r[1][3]~q\,
	datac => \remain[0]~input_o\,
	datad => \regs_i|r[0][3]~q\,
	combout => \regs_i|y~12_combout\);

-- Location: LCCOMB_X26_Y17_N26
\regs_i|y~13\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|y~13_combout\ = (\remain[1]~input_o\ & ((\regs_i|y~12_combout\ & ((\regs_i|r[3][3]~q\))) # (!\regs_i|y~12_combout\ & (\regs_i|r[2][3]~q\)))) # (!\remain[1]~input_o\ & (((\regs_i|y~12_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010110001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \remain[1]~input_o\,
	datab => \regs_i|r[2][3]~q\,
	datac => \regs_i|r[3][3]~q\,
	datad => \regs_i|y~12_combout\,
	combout => \regs_i|y~13_combout\);

-- Location: LCCOMB_X28_Y16_N0
\regs_i|y~14\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|y~14_combout\ = (\remain[2]~input_o\ & (\regs_i|pc\(3))) # (!\remain[2]~input_o\ & ((\regs_i|y~13_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001111000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \remain[2]~input_o\,
	datac => \regs_i|pc\(3),
	datad => \regs_i|y~13_combout\,
	combout => \regs_i|y~14_combout\);

-- Location: FF_X28_Y16_N1
\regs_i|y[3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|y~14_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|y\(3));

-- Location: LCCOMB_X29_Y16_N26
\alu_i|Mux4~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Mux4~2_combout\ = (\regs_i|y\(3) & ((!\regs_i|x\(3)) # (!\key_sel[1]~input_o\))) # (!\regs_i|y\(3) & ((\regs_i|x\(3))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011111111110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \key_sel[1]~input_o\,
	datac => \regs_i|y\(3),
	datad => \regs_i|x\(3),
	combout => \alu_i|Mux4~2_combout\);

-- Location: LCCOMB_X29_Y16_N22
\alu_i|res~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|res~3_combout\ = (\regs_i|y\(3) & \regs_i|x\(3))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \regs_i|y\(3),
	datad => \regs_i|x\(3),
	combout => \alu_i|res~3_combout\);

-- Location: IOIBUF_X0_Y12_N22
\remain[3]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_remain(3),
	o => \remain[3]~input_o\);

-- Location: LCCOMB_X25_Y16_N0
\regs_i|r[0][4]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[0][4]~feeder_combout\ = \regs_i|r~13_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \regs_i|r~13_combout\,
	combout => \regs_i|r[0][4]~feeder_combout\);

-- Location: LCCOMB_X26_Y15_N28
\regs_i|r[0][4]~8\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[0][4]~8_combout\ = (\regs_i|r[0][4]~7_combout\ & ((\regs_i|r[0][4]~2_combout\) # ((!\key_sel[1]~input_o\ & \regs_i|r[0][2]~1_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100110001000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \key_sel[1]~input_o\,
	datab => \regs_i|r[0][4]~7_combout\,
	datac => \regs_i|r[0][2]~1_combout\,
	datad => \regs_i|r[0][4]~2_combout\,
	combout => \regs_i|r[0][4]~8_combout\);

-- Location: FF_X25_Y16_N1
\regs_i|r[0][4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|r[0][4]~feeder_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|r[0][4]~8_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[0][4]~q\);

-- Location: LCCOMB_X26_Y17_N16
\regs_i|r[2][4]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[2][4]~feeder_combout\ = \regs_i|r~13_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \regs_i|r~13_combout\,
	combout => \regs_i|r[2][4]~feeder_combout\);

-- Location: LCCOMB_X27_Y15_N16
\regs_i|r[2][7]~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[2][7]~6_combout\ = (\regs_i|r[2][7]~5_combout\ & ((\regs_i|r[0][4]~2_combout\) # ((!\key_sel[1]~input_o\ & \regs_i|r[0][2]~1_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010001010100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|r[2][7]~5_combout\,
	datab => \key_sel[1]~input_o\,
	datac => \regs_i|r[0][4]~2_combout\,
	datad => \regs_i|r[0][2]~1_combout\,
	combout => \regs_i|r[2][7]~6_combout\);

-- Location: FF_X26_Y17_N17
\regs_i|r[2][4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|r[2][4]~feeder_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|r[2][7]~6_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[2][4]~q\);

-- Location: LCCOMB_X25_Y17_N18
\regs_i|y~9\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|y~9_combout\ = (\remain[1]~input_o\ & (((\remain[0]~input_o\) # (\regs_i|r[2][4]~q\)))) # (!\remain[1]~input_o\ & (\regs_i|r[0][4]~q\ & (!\remain[0]~input_o\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100111011000010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|r[0][4]~q\,
	datab => \remain[1]~input_o\,
	datac => \remain[0]~input_o\,
	datad => \regs_i|r[2][4]~q\,
	combout => \regs_i|y~9_combout\);

-- Location: LCCOMB_X26_Y15_N26
\regs_i|r[3][4]~10\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[3][4]~10_combout\ = (\regs_i|r[3][4]~9_combout\ & ((\regs_i|r[0][4]~2_combout\) # ((!\key_sel[1]~input_o\ & \regs_i|r[0][2]~1_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100110001000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \key_sel[1]~input_o\,
	datab => \regs_i|r[3][4]~9_combout\,
	datac => \regs_i|r[0][2]~1_combout\,
	datad => \regs_i|r[0][4]~2_combout\,
	combout => \regs_i|r[3][4]~10_combout\);

-- Location: FF_X26_Y16_N1
\regs_i|r[3][4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|r~13_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|r[3][4]~10_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[3][4]~q\);

-- Location: LCCOMB_X25_Y17_N12
\regs_i|y~10\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|y~10_combout\ = (\regs_i|y~9_combout\ & (((\regs_i|r[3][4]~q\) # (!\remain[0]~input_o\)))) # (!\regs_i|y~9_combout\ & (\regs_i|r[1][4]~q\ & (\remain[0]~input_o\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110110000101100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|r[1][4]~q\,
	datab => \regs_i|y~9_combout\,
	datac => \remain[0]~input_o\,
	datad => \regs_i|r[3][4]~q\,
	combout => \regs_i|y~10_combout\);

-- Location: LCCOMB_X29_Y16_N10
\regs_i|y~11\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|y~11_combout\ = (\remain[2]~input_o\ & (\regs_i|pc\(4))) # (!\remain[2]~input_o\ & ((\regs_i|y~10_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100111111000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|pc\(4),
	datac => \remain[2]~input_o\,
	datad => \regs_i|y~10_combout\,
	combout => \regs_i|y~11_combout\);

-- Location: FF_X29_Y16_N11
\regs_i|y[4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|y~11_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|y\(4));

-- Location: LCCOMB_X26_Y16_N20
\alu_i|Mux3~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Mux3~2_combout\ = (\regs_i|x\(4) & ((!\regs_i|y\(4)) # (!\key_sel[1]~input_o\))) # (!\regs_i|x\(4) & ((\regs_i|y\(4))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101111111110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \key_sel[1]~input_o\,
	datac => \regs_i|x\(4),
	datad => \regs_i|y\(4),
	combout => \alu_i|Mux3~2_combout\);

-- Location: LCCOMB_X26_Y15_N10
\regs_i|r~21\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r~21_combout\ = (\regs_i|page~q\ & ((\regs_i|data[0]~1_combout\))) # (!\regs_i|page~q\ & (\regs_i|u_key|val\(0)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000011001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|u_key|val\(0),
	datac => \regs_i|data[0]~1_combout\,
	datad => \regs_i|page~q\,
	combout => \regs_i|r~21_combout\);

-- Location: FF_X26_Y15_N11
\regs_i|r[3][0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|r~21_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|r[3][2]~18_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[3][0]~q\);

-- Location: FF_X25_Y15_N9
\regs_i|r[0][0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	asdata => \regs_i|r~21_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => VCC,
	ena => \regs_i|r[0][2]~17_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[0][0]~q\);

-- Location: FF_X25_Y15_N19
\regs_i|r[2][0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	asdata => \regs_i|r~21_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => VCC,
	ena => \regs_i|r[2][3]~16_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[2][0]~q\);

-- Location: LCCOMB_X25_Y15_N8
\regs_i|y~21\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|y~21_combout\ = (\remain[1]~input_o\ & ((\remain[0]~input_o\) # ((\regs_i|r[2][0]~q\)))) # (!\remain[1]~input_o\ & (!\remain[0]~input_o\ & (\regs_i|r[0][0]~q\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011101010011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \remain[1]~input_o\,
	datab => \remain[0]~input_o\,
	datac => \regs_i|r[0][0]~q\,
	datad => \regs_i|r[2][0]~q\,
	combout => \regs_i|y~21_combout\);

-- Location: LCCOMB_X26_Y15_N12
\regs_i|r[1][0]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[1][0]~feeder_combout\ = \regs_i|r~21_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \regs_i|r~21_combout\,
	combout => \regs_i|r[1][0]~feeder_combout\);

-- Location: FF_X26_Y15_N13
\regs_i|r[1][0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|r[1][0]~feeder_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|r[1][3]~15_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[1][0]~q\);

-- Location: LCCOMB_X25_Y15_N6
\regs_i|y~22\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|y~22_combout\ = (\regs_i|y~21_combout\ & ((\regs_i|r[3][0]~q\) # ((!\remain[0]~input_o\)))) # (!\regs_i|y~21_combout\ & (((\regs_i|r[1][0]~q\ & \remain[0]~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011100011001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|r[3][0]~q\,
	datab => \regs_i|y~21_combout\,
	datac => \regs_i|r[1][0]~q\,
	datad => \remain[0]~input_o\,
	combout => \regs_i|y~22_combout\);

-- Location: LCCOMB_X28_Y16_N6
\regs_i|y~23\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|y~23_combout\ = (\remain[2]~input_o\ & (\regs_i|pc\(0))) # (!\remain[2]~input_o\ & ((\regs_i|y~22_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001111000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \remain[2]~input_o\,
	datac => \regs_i|pc\(0),
	datad => \regs_i|y~22_combout\,
	combout => \regs_i|y~23_combout\);

-- Location: FF_X28_Y16_N7
\regs_i|y[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|y~23_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|y\(0));

-- Location: LCCOMB_X25_Y15_N26
\regs_i|x~14\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|x~14_combout\ = (\m[0]~input_o\ & (((\regs_i|r[2][0]~q\) # (\remain[3]~input_o\)))) # (!\m[0]~input_o\ & (\regs_i|r[0][0]~q\ & ((!\remain[3]~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000011001010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|r[0][0]~q\,
	datab => \regs_i|r[2][0]~q\,
	datac => \m[0]~input_o\,
	datad => \remain[3]~input_o\,
	combout => \regs_i|x~14_combout\);

-- Location: LCCOMB_X25_Y15_N0
\regs_i|x~15\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|x~15_combout\ = (\remain[3]~input_o\ & ((\regs_i|x~14_combout\ & ((\regs_i|r[3][0]~q\))) # (!\regs_i|x~14_combout\ & (\regs_i|r[1][0]~q\)))) # (!\remain[3]~input_o\ & (((\regs_i|x~14_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111100001011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \remain[3]~input_o\,
	datab => \regs_i|r[1][0]~q\,
	datac => \regs_i|x~14_combout\,
	datad => \regs_i|r[3][0]~q\,
	combout => \regs_i|x~15_combout\);

-- Location: LCCOMB_X28_Y16_N4
\regs_i|x[0]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|x[0]~feeder_combout\ = \regs_i|x~15_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \regs_i|x~15_combout\,
	combout => \regs_i|x[0]~feeder_combout\);

-- Location: FF_X28_Y16_N5
\regs_i|x[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|x[0]~feeder_combout\,
	asdata => \regs_i|pc\(0),
	clrn => \rst~inputclkctrl_outclk\,
	sload => \m[1]~input_o\,
	ena => \regs_i|page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|x\(0));

-- Location: LCCOMB_X28_Y16_N12
\alu_i|Add0~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Add0~0_combout\ = (\regs_i|y\(0) & (\regs_i|x\(0) $ (VCC))) # (!\regs_i|y\(0) & (\regs_i|x\(0) & VCC))
-- \alu_i|Add0~1\ = CARRY((\regs_i|y\(0) & \regs_i|x\(0)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110011010001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|y\(0),
	datab => \regs_i|x\(0),
	datad => VCC,
	combout => \alu_i|Add0~0_combout\,
	cout => \alu_i|Add0~1\);

-- Location: LCCOMB_X28_Y16_N14
\alu_i|Add0~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Add0~2_combout\ = (\regs_i|x\(1) & ((\regs_i|y\(1) & (\alu_i|Add0~1\ & VCC)) # (!\regs_i|y\(1) & (!\alu_i|Add0~1\)))) # (!\regs_i|x\(1) & ((\regs_i|y\(1) & (!\alu_i|Add0~1\)) # (!\regs_i|y\(1) & ((\alu_i|Add0~1\) # (GND)))))
-- \alu_i|Add0~3\ = CARRY((\regs_i|x\(1) & (!\regs_i|y\(1) & !\alu_i|Add0~1\)) # (!\regs_i|x\(1) & ((!\alu_i|Add0~1\) # (!\regs_i|y\(1)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000010111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|x\(1),
	datab => \regs_i|y\(1),
	datad => VCC,
	cin => \alu_i|Add0~1\,
	combout => \alu_i|Add0~2_combout\,
	cout => \alu_i|Add0~3\);

-- Location: LCCOMB_X28_Y16_N16
\alu_i|Add0~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Add0~4_combout\ = ((\regs_i|y\(2) $ (\regs_i|x\(2) $ (!\alu_i|Add0~3\)))) # (GND)
-- \alu_i|Add0~5\ = CARRY((\regs_i|y\(2) & ((\regs_i|x\(2)) # (!\alu_i|Add0~3\))) # (!\regs_i|y\(2) & (\regs_i|x\(2) & !\alu_i|Add0~3\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100110001110",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|y\(2),
	datab => \regs_i|x\(2),
	datad => VCC,
	cin => \alu_i|Add0~3\,
	combout => \alu_i|Add0~4_combout\,
	cout => \alu_i|Add0~5\);

-- Location: LCCOMB_X28_Y16_N18
\alu_i|Add0~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Add0~6_combout\ = (\regs_i|y\(3) & ((\regs_i|x\(3) & (\alu_i|Add0~5\ & VCC)) # (!\regs_i|x\(3) & (!\alu_i|Add0~5\)))) # (!\regs_i|y\(3) & ((\regs_i|x\(3) & (!\alu_i|Add0~5\)) # (!\regs_i|x\(3) & ((\alu_i|Add0~5\) # (GND)))))
-- \alu_i|Add0~7\ = CARRY((\regs_i|y\(3) & (!\regs_i|x\(3) & !\alu_i|Add0~5\)) # (!\regs_i|y\(3) & ((!\alu_i|Add0~5\) # (!\regs_i|x\(3)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000010111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|y\(3),
	datab => \regs_i|x\(3),
	datad => VCC,
	cin => \alu_i|Add0~5\,
	combout => \alu_i|Add0~6_combout\,
	cout => \alu_i|Add0~7\);

-- Location: LCCOMB_X28_Y16_N20
\alu_i|Add0~8\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Add0~8_combout\ = ((\regs_i|x\(4) $ (\regs_i|y\(4) $ (!\alu_i|Add0~7\)))) # (GND)
-- \alu_i|Add0~9\ = CARRY((\regs_i|x\(4) & ((\regs_i|y\(4)) # (!\alu_i|Add0~7\))) # (!\regs_i|x\(4) & (\regs_i|y\(4) & !\alu_i|Add0~7\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100110001110",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|x\(4),
	datab => \regs_i|y\(4),
	datad => VCC,
	cin => \alu_i|Add0~7\,
	combout => \alu_i|Add0~8_combout\,
	cout => \alu_i|Add0~9\);

-- Location: IOIBUF_X7_Y0_N22
\cin~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_cin,
	o => \cin~input_o\);

-- Location: LCCOMB_X27_Y16_N6
\alu_i|Add1~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Add1~0_combout\ = (\cin~input_o\ & (\alu_i|Add0~0_combout\ & VCC)) # (!\cin~input_o\ & (\alu_i|Add0~0_combout\ $ (VCC)))
-- \alu_i|Add1~1\ = CARRY((!\cin~input_o\ & \alu_i|Add0~0_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001100101000100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \cin~input_o\,
	datab => \alu_i|Add0~0_combout\,
	datad => VCC,
	combout => \alu_i|Add1~0_combout\,
	cout => \alu_i|Add1~1\);

-- Location: LCCOMB_X27_Y16_N8
\alu_i|Add1~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Add1~2_combout\ = (\alu_i|Add0~2_combout\ & (\alu_i|Add1~1\ & VCC)) # (!\alu_i|Add0~2_combout\ & (!\alu_i|Add1~1\))
-- \alu_i|Add1~3\ = CARRY((!\alu_i|Add0~2_combout\ & !\alu_i|Add1~1\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100000011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \alu_i|Add0~2_combout\,
	datad => VCC,
	cin => \alu_i|Add1~1\,
	combout => \alu_i|Add1~2_combout\,
	cout => \alu_i|Add1~3\);

-- Location: LCCOMB_X27_Y16_N10
\alu_i|Add1~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Add1~4_combout\ = (\alu_i|Add0~4_combout\ & ((GND) # (!\alu_i|Add1~3\))) # (!\alu_i|Add0~4_combout\ & (\alu_i|Add1~3\ $ (GND)))
-- \alu_i|Add1~5\ = CARRY((\alu_i|Add0~4_combout\) # (!\alu_i|Add1~3\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110011001111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \alu_i|Add0~4_combout\,
	datad => VCC,
	cin => \alu_i|Add1~3\,
	combout => \alu_i|Add1~4_combout\,
	cout => \alu_i|Add1~5\);

-- Location: LCCOMB_X27_Y16_N12
\alu_i|Add1~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Add1~6_combout\ = (\alu_i|Add0~6_combout\ & (\alu_i|Add1~5\ & VCC)) # (!\alu_i|Add0~6_combout\ & (!\alu_i|Add1~5\))
-- \alu_i|Add1~7\ = CARRY((!\alu_i|Add0~6_combout\ & !\alu_i|Add1~5\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100000011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \alu_i|Add0~6_combout\,
	datad => VCC,
	cin => \alu_i|Add1~5\,
	combout => \alu_i|Add1~6_combout\,
	cout => \alu_i|Add1~7\);

-- Location: LCCOMB_X27_Y16_N14
\alu_i|Add1~8\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Add1~8_combout\ = (\alu_i|Add0~8_combout\ & ((GND) # (!\alu_i|Add1~7\))) # (!\alu_i|Add0~8_combout\ & (\alu_i|Add1~7\ $ (GND)))
-- \alu_i|Add1~9\ = CARRY((\alu_i|Add0~8_combout\) # (!\alu_i|Add1~7\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101010101111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \alu_i|Add0~8_combout\,
	datad => VCC,
	cin => \alu_i|Add1~7\,
	combout => \alu_i|Add1~8_combout\,
	cout => \alu_i|Add1~9\);

-- Location: FF_X26_Y17_N13
\regs_i|r[3][6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|r~11_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|r[3][4]~10_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[3][6]~q\);

-- Location: FF_X25_Y17_N29
\regs_i|r[0][6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	asdata => \regs_i|r~11_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => VCC,
	ena => \regs_i|r[0][4]~8_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[0][6]~q\);

-- Location: LCCOMB_X26_Y17_N4
\regs_i|r[2][6]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[2][6]~feeder_combout\ = \regs_i|r~11_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \regs_i|r~11_combout\,
	combout => \regs_i|r[2][6]~feeder_combout\);

-- Location: FF_X26_Y17_N5
\regs_i|r[2][6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|r[2][6]~feeder_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|r[2][7]~6_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[2][6]~q\);

-- Location: LCCOMB_X25_Y17_N28
\regs_i|y~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|y~3_combout\ = (\remain[1]~input_o\ & ((\remain[0]~input_o\) # ((\regs_i|r[2][6]~q\)))) # (!\remain[1]~input_o\ & (!\remain[0]~input_o\ & (\regs_i|r[0][6]~q\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011101010011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \remain[1]~input_o\,
	datab => \remain[0]~input_o\,
	datac => \regs_i|r[0][6]~q\,
	datad => \regs_i|r[2][6]~q\,
	combout => \regs_i|y~3_combout\);

-- Location: LCCOMB_X25_Y17_N30
\regs_i|y~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|y~4_combout\ = (\remain[0]~input_o\ & ((\regs_i|y~3_combout\ & ((\regs_i|r[3][6]~q\))) # (!\regs_i|y~3_combout\ & (\regs_i|r[1][6]~q\)))) # (!\remain[0]~input_o\ & (((\regs_i|y~3_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100111110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|r[1][6]~q\,
	datab => \regs_i|r[3][6]~q\,
	datac => \remain[0]~input_o\,
	datad => \regs_i|y~3_combout\,
	combout => \regs_i|y~4_combout\);

-- Location: LCCOMB_X29_Y16_N20
\regs_i|y~5\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|y~5_combout\ = (\remain[2]~input_o\ & ((\regs_i|pc\(6)))) # (!\remain[2]~input_o\ & (\regs_i|y~4_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111101001010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \remain[2]~input_o\,
	datac => \regs_i|y~4_combout\,
	datad => \regs_i|pc\(6),
	combout => \regs_i|y~5_combout\);

-- Location: FF_X29_Y16_N21
\regs_i|y[6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|y~5_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|y\(6));

-- Location: LCCOMB_X28_Y14_N14
\regs_i|data[6]~39\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[6]~39_combout\ = (\regs_i|x\(6) & ((!\regs_i|y\(6)) # (!\key_sel[1]~input_o\))) # (!\regs_i|x\(6) & ((\regs_i|y\(6))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101111110101010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|x\(6),
	datac => \key_sel[1]~input_o\,
	datad => \regs_i|y\(6),
	combout => \regs_i|data[6]~39_combout\);

-- Location: LCCOMB_X28_Y14_N6
\regs_i|data[6]~37\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[6]~37_combout\ = (\alu_i|Mux1~1_combout\ & (((\regs_i|x\(7))))) # (!\alu_i|Mux1~1_combout\ & (\regs_i|y\(6) & (\regs_i|x\(6))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110110000100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|y\(6),
	datab => \alu_i|Mux1~1_combout\,
	datac => \regs_i|x\(6),
	datad => \regs_i|x\(7),
	combout => \regs_i|data[6]~37_combout\);

-- Location: LCCOMB_X28_Y14_N16
\regs_i|data[6]~38\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[6]~38_combout\ = (\alu_i|Mux1~0_combout\ & ((\regs_i|data[6]~37_combout\))) # (!\alu_i|Mux1~0_combout\ & (\alu_i|Mux1~1_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110000001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \alu_i|Mux1~1_combout\,
	datac => \alu_i|Mux1~0_combout\,
	datad => \regs_i|data[6]~37_combout\,
	combout => \regs_i|data[6]~38_combout\);

-- Location: LCCOMB_X28_Y14_N2
\regs_i|data[6]~55\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[6]~55_combout\ = (\key_sel[0]~input_o\ & ((\rd~input_o\ & ((\regs_i|data[6]~38_combout\))) # (!\rd~input_o\ & (\regs_i|data[6]~39_combout\)))) # (!\key_sel[0]~input_o\ & (((\regs_i|data[6]~38_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110100100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \key_sel[0]~input_o\,
	datab => \rd~input_o\,
	datac => \regs_i|data[6]~39_combout\,
	datad => \regs_i|data[6]~38_combout\,
	combout => \regs_i|data[6]~55_combout\);

-- Location: LCCOMB_X28_Y14_N24
\regs_i|data[6]~54\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[6]~54_combout\ = (\key_sel[0]~input_o\ & (((\regs_i|data[6]~38_combout\)))) # (!\key_sel[0]~input_o\ & ((\rd~input_o\ & ((\regs_i|x\(5)) # (!\regs_i|data[6]~38_combout\))) # (!\rd~input_o\ & ((\regs_i|data[6]~38_combout\)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111101101000100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \key_sel[0]~input_o\,
	datab => \rd~input_o\,
	datac => \regs_i|x\(5),
	datad => \regs_i|data[6]~38_combout\,
	combout => \regs_i|data[6]~54_combout\);

-- Location: LCCOMB_X26_Y17_N0
\regs_i|r[2][5]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[2][5]~feeder_combout\ = \regs_i|r~12_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \regs_i|r~12_combout\,
	combout => \regs_i|r[2][5]~feeder_combout\);

-- Location: FF_X26_Y17_N1
\regs_i|r[2][5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|r[2][5]~feeder_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|r[2][7]~6_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[2][5]~q\);

-- Location: FF_X26_Y17_N21
\regs_i|r[3][5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|r~12_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|r[3][4]~10_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[3][5]~q\);

-- Location: FF_X25_Y17_N15
\regs_i|r[0][5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	asdata => \regs_i|r~12_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => VCC,
	ena => \regs_i|r[0][4]~8_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[0][5]~q\);

-- Location: LCCOMB_X25_Y17_N14
\regs_i|y~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|y~6_combout\ = (\remain[1]~input_o\ & (\remain[0]~input_o\)) # (!\remain[1]~input_o\ & ((\remain[0]~input_o\ & ((\regs_i|r[1][5]~q\))) # (!\remain[0]~input_o\ & (\regs_i|r[0][5]~q\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110010011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \remain[1]~input_o\,
	datab => \remain[0]~input_o\,
	datac => \regs_i|r[0][5]~q\,
	datad => \regs_i|r[1][5]~q\,
	combout => \regs_i|y~6_combout\);

-- Location: LCCOMB_X26_Y17_N30
\regs_i|y~7\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|y~7_combout\ = (\remain[1]~input_o\ & ((\regs_i|y~6_combout\ & ((\regs_i|r[3][5]~q\))) # (!\regs_i|y~6_combout\ & (\regs_i|r[2][5]~q\)))) # (!\remain[1]~input_o\ & (((\regs_i|y~6_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010110001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \remain[1]~input_o\,
	datab => \regs_i|r[2][5]~q\,
	datac => \regs_i|r[3][5]~q\,
	datad => \regs_i|y~6_combout\,
	combout => \regs_i|y~7_combout\);

-- Location: LCCOMB_X28_Y16_N10
\regs_i|y~8\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|y~8_combout\ = (\remain[2]~input_o\ & ((\regs_i|pc\(5)))) # (!\remain[2]~input_o\ & (\regs_i|y~7_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110111000100010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|y~7_combout\,
	datab => \remain[2]~input_o\,
	datad => \regs_i|pc\(5),
	combout => \regs_i|y~8_combout\);

-- Location: FF_X28_Y16_N11
\regs_i|y[5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|y~8_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|y\(5));

-- Location: LCCOMB_X28_Y16_N22
\alu_i|Add0~10\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Add0~10_combout\ = (\regs_i|y\(5) & ((\regs_i|x\(5) & (\alu_i|Add0~9\ & VCC)) # (!\regs_i|x\(5) & (!\alu_i|Add0~9\)))) # (!\regs_i|y\(5) & ((\regs_i|x\(5) & (!\alu_i|Add0~9\)) # (!\regs_i|x\(5) & ((\alu_i|Add0~9\) # (GND)))))
-- \alu_i|Add0~11\ = CARRY((\regs_i|y\(5) & (!\regs_i|x\(5) & !\alu_i|Add0~9\)) # (!\regs_i|y\(5) & ((!\alu_i|Add0~9\) # (!\regs_i|x\(5)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000010111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|y\(5),
	datab => \regs_i|x\(5),
	datad => VCC,
	cin => \alu_i|Add0~9\,
	combout => \alu_i|Add0~10_combout\,
	cout => \alu_i|Add0~11\);

-- Location: LCCOMB_X28_Y16_N24
\alu_i|Add0~12\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Add0~12_combout\ = ((\regs_i|y\(6) $ (\regs_i|x\(6) $ (!\alu_i|Add0~11\)))) # (GND)
-- \alu_i|Add0~13\ = CARRY((\regs_i|y\(6) & ((\regs_i|x\(6)) # (!\alu_i|Add0~11\))) # (!\regs_i|y\(6) & (\regs_i|x\(6) & !\alu_i|Add0~11\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110100110001110",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|y\(6),
	datab => \regs_i|x\(6),
	datad => VCC,
	cin => \alu_i|Add0~11\,
	combout => \alu_i|Add0~12_combout\,
	cout => \alu_i|Add0~13\);

-- Location: LCCOMB_X27_Y16_N16
\alu_i|Add1~10\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Add1~10_combout\ = (\alu_i|Add0~10_combout\ & (\alu_i|Add1~9\ & VCC)) # (!\alu_i|Add0~10_combout\ & (!\alu_i|Add1~9\))
-- \alu_i|Add1~11\ = CARRY((!\alu_i|Add0~10_combout\ & !\alu_i|Add1~9\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100000011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \alu_i|Add0~10_combout\,
	datad => VCC,
	cin => \alu_i|Add1~9\,
	combout => \alu_i|Add1~10_combout\,
	cout => \alu_i|Add1~11\);

-- Location: LCCOMB_X27_Y16_N18
\alu_i|Add1~12\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Add1~12_combout\ = (\alu_i|Add0~12_combout\ & ((GND) # (!\alu_i|Add1~11\))) # (!\alu_i|Add0~12_combout\ & (\alu_i|Add1~11\ $ (GND)))
-- \alu_i|Add1~13\ = CARRY((\alu_i|Add0~12_combout\) # (!\alu_i|Add1~11\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110011001111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \alu_i|Add0~12_combout\,
	datad => VCC,
	cin => \alu_i|Add1~11\,
	combout => \alu_i|Add1~12_combout\,
	cout => \alu_i|Add1~13\);

-- Location: LCCOMB_X27_Y16_N0
\regs_i|data[6]~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[6]~4_combout\ = (\alu_i|Mux1~2_combout\ & (\regs_i|data[6]~55_combout\)) # (!\alu_i|Mux1~2_combout\ & (\regs_i|data[6]~54_combout\ & ((\regs_i|data[6]~55_combout\) # (\alu_i|Add1~12_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101100011001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \alu_i|Mux1~2_combout\,
	datab => \regs_i|data[6]~55_combout\,
	datac => \regs_i|data[6]~54_combout\,
	datad => \alu_i|Add1~12_combout\,
	combout => \regs_i|data[6]~4_combout\);

-- Location: LCCOMB_X26_Y17_N12
\regs_i|r~11\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r~11_combout\ = (\regs_i|page~q\ & ((\regs_i|data[6]~4_combout\))) # (!\regs_i|page~q\ & (\regs_i|u_key|val\(2)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110000001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|u_key|val\(2),
	datac => \regs_i|page~q\,
	datad => \regs_i|data[6]~4_combout\,
	combout => \regs_i|r~11_combout\);

-- Location: LCCOMB_X27_Y15_N28
\regs_i|r[1][4]~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[1][4]~4_combout\ = (\regs_i|r[1][4]~3_combout\ & ((\regs_i|r[0][4]~2_combout\) # ((!\key_sel[1]~input_o\ & \regs_i|r[0][2]~1_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010001010100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|r[1][4]~3_combout\,
	datab => \key_sel[1]~input_o\,
	datac => \regs_i|r[0][4]~2_combout\,
	datad => \regs_i|r[0][2]~1_combout\,
	combout => \regs_i|r[1][4]~4_combout\);

-- Location: FF_X25_Y17_N11
\regs_i|r[1][6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	asdata => \regs_i|r~11_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => VCC,
	ena => \regs_i|r[1][4]~4_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[1][6]~q\);

-- Location: LCCOMB_X26_Y17_N2
\regs_i|x~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|x~2_combout\ = (\m[0]~input_o\ & ((\regs_i|r[2][6]~q\) # ((\remain[3]~input_o\)))) # (!\m[0]~input_o\ & (((!\remain[3]~input_o\ & \regs_i|r[0][6]~q\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010110110101000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \m[0]~input_o\,
	datab => \regs_i|r[2][6]~q\,
	datac => \remain[3]~input_o\,
	datad => \regs_i|r[0][6]~q\,
	combout => \regs_i|x~2_combout\);

-- Location: LCCOMB_X26_Y17_N6
\regs_i|x~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|x~3_combout\ = (\remain[3]~input_o\ & ((\regs_i|x~2_combout\ & ((\regs_i|r[3][6]~q\))) # (!\regs_i|x~2_combout\ & (\regs_i|r[1][6]~q\)))) # (!\remain[3]~input_o\ & (((\regs_i|x~2_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100111110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|r[1][6]~q\,
	datab => \regs_i|r[3][6]~q\,
	datac => \remain[3]~input_o\,
	datad => \regs_i|x~2_combout\,
	combout => \regs_i|x~3_combout\);

-- Location: LCCOMB_X28_Y14_N26
\regs_i|x[6]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|x[6]~feeder_combout\ = \regs_i|x~3_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \regs_i|x~3_combout\,
	combout => \regs_i|x[6]~feeder_combout\);

-- Location: FF_X28_Y14_N27
\regs_i|x[6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|x[6]~feeder_combout\,
	asdata => \regs_i|pc\(6),
	clrn => \rst~inputclkctrl_outclk\,
	sload => \m[1]~input_o\,
	ena => \regs_i|page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|x\(6));

-- Location: LCCOMB_X28_Y14_N28
\regs_i|data[5]~28\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[5]~28_combout\ = (\alu_i|Mux1~1_combout\ & (\regs_i|x\(6))) # (!\alu_i|Mux1~1_combout\ & (((\regs_i|y\(5) & \regs_i|x\(5)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011100010001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|x\(6),
	datab => \alu_i|Mux1~1_combout\,
	datac => \regs_i|y\(5),
	datad => \regs_i|x\(5),
	combout => \regs_i|data[5]~28_combout\);

-- Location: LCCOMB_X28_Y14_N30
\regs_i|data[5]~29\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[5]~29_combout\ = (\alu_i|Mux1~0_combout\ & ((\regs_i|data[5]~28_combout\))) # (!\alu_i|Mux1~0_combout\ & (\alu_i|Mux1~1_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110000001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \alu_i|Mux1~1_combout\,
	datac => \alu_i|Mux1~0_combout\,
	datad => \regs_i|data[5]~28_combout\,
	combout => \regs_i|data[5]~29_combout\);

-- Location: LCCOMB_X28_Y14_N12
\regs_i|data[5]~30\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[5]~30_combout\ = (\regs_i|y\(5) & ((!\regs_i|x\(5)) # (!\key_sel[1]~input_o\))) # (!\regs_i|y\(5) & ((\regs_i|x\(5))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101111111110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \key_sel[1]~input_o\,
	datac => \regs_i|y\(5),
	datad => \regs_i|x\(5),
	combout => \regs_i|data[5]~30_combout\);

-- Location: LCCOMB_X28_Y14_N22
\regs_i|data[5]~53\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[5]~53_combout\ = (\key_sel[0]~input_o\ & ((\rd~input_o\ & (\regs_i|data[5]~29_combout\)) # (!\rd~input_o\ & ((\regs_i|data[5]~30_combout\))))) # (!\key_sel[0]~input_o\ & (((\regs_i|data[5]~29_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001011010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \key_sel[0]~input_o\,
	datab => \rd~input_o\,
	datac => \regs_i|data[5]~29_combout\,
	datad => \regs_i|data[5]~30_combout\,
	combout => \regs_i|data[5]~53_combout\);

-- Location: LCCOMB_X28_Y14_N20
\regs_i|data[5]~52\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[5]~52_combout\ = (\key_sel[0]~input_o\ & (((\regs_i|data[5]~29_combout\)))) # (!\key_sel[0]~input_o\ & ((\rd~input_o\ & ((\regs_i|x\(4)) # (!\regs_i|data[5]~29_combout\))) # (!\rd~input_o\ & (\regs_i|data[5]~29_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010010110100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \key_sel[0]~input_o\,
	datab => \rd~input_o\,
	datac => \regs_i|data[5]~29_combout\,
	datad => \regs_i|x\(4),
	combout => \regs_i|data[5]~52_combout\);

-- Location: LCCOMB_X27_Y16_N26
\regs_i|data[5]~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[5]~2_combout\ = (\alu_i|Mux1~2_combout\ & (\regs_i|data[5]~53_combout\)) # (!\alu_i|Mux1~2_combout\ & (\regs_i|data[5]~52_combout\ & ((\regs_i|data[5]~53_combout\) # (\alu_i|Add1~10_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101100011001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \alu_i|Mux1~2_combout\,
	datab => \regs_i|data[5]~53_combout\,
	datac => \regs_i|data[5]~52_combout\,
	datad => \alu_i|Add1~10_combout\,
	combout => \regs_i|data[5]~2_combout\);

-- Location: LCCOMB_X26_Y17_N20
\regs_i|r~12\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r~12_combout\ = (\regs_i|page~q\ & (\regs_i|data[5]~2_combout\)) # (!\regs_i|page~q\ & ((\regs_i|u_key|val\(1))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001111000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|page~q\,
	datac => \regs_i|data[5]~2_combout\,
	datad => \regs_i|u_key|val\(1),
	combout => \regs_i|r~12_combout\);

-- Location: FF_X25_Y17_N21
\regs_i|r[1][5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	asdata => \regs_i|r~12_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => VCC,
	ena => \regs_i|r[1][4]~4_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[1][5]~q\);

-- Location: LCCOMB_X26_Y17_N14
\regs_i|x~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|x~4_combout\ = (\m[0]~input_o\ & ((\regs_i|r[2][5]~q\) # ((\remain[3]~input_o\)))) # (!\m[0]~input_o\ & (((!\remain[3]~input_o\ & \regs_i|r[0][5]~q\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010110110101000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \m[0]~input_o\,
	datab => \regs_i|r[2][5]~q\,
	datac => \remain[3]~input_o\,
	datad => \regs_i|r[0][5]~q\,
	combout => \regs_i|x~4_combout\);

-- Location: LCCOMB_X25_Y16_N28
\regs_i|x~5\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|x~5_combout\ = (\regs_i|x~4_combout\ & (((\regs_i|r[3][5]~q\) # (!\remain[3]~input_o\)))) # (!\regs_i|x~4_combout\ & (\regs_i|r[1][5]~q\ & ((\remain[3]~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110001011001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|r[1][5]~q\,
	datab => \regs_i|x~4_combout\,
	datac => \regs_i|r[3][5]~q\,
	datad => \remain[3]~input_o\,
	combout => \regs_i|x~5_combout\);

-- Location: LCCOMB_X29_Y16_N0
\regs_i|x[5]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|x[5]~feeder_combout\ = \regs_i|x~5_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \regs_i|x~5_combout\,
	combout => \regs_i|x[5]~feeder_combout\);

-- Location: FF_X29_Y16_N1
\regs_i|x[5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|x[5]~feeder_combout\,
	asdata => \regs_i|pc\(5),
	clrn => \rst~inputclkctrl_outclk\,
	sload => \m[1]~input_o\,
	ena => \regs_i|page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|x\(5));

-- Location: LCCOMB_X29_Y16_N30
\alu_i|res~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|res~0_combout\ = (\regs_i|x\(4) & \regs_i|y\(4))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100110000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|x\(4),
	datad => \regs_i|y\(4),
	combout => \alu_i|res~0_combout\);

-- Location: LCCOMB_X29_Y16_N16
\alu_i|Mux3~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Mux3~0_combout\ = (\alu_i|Mux1~0_combout\ & ((\alu_i|Mux1~1_combout\ & (\regs_i|x\(5))) # (!\alu_i|Mux1~1_combout\ & ((\alu_i|res~0_combout\))))) # (!\alu_i|Mux1~0_combout\ & (((\alu_i|Mux1~1_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \alu_i|Mux1~0_combout\,
	datab => \regs_i|x\(5),
	datac => \alu_i|res~0_combout\,
	datad => \alu_i|Mux1~1_combout\,
	combout => \alu_i|Mux3~0_combout\);

-- Location: LCCOMB_X26_Y16_N10
\alu_i|Mux3~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Mux3~1_combout\ = (\alu_i|Mux0~0_combout\ & ((\alu_i|Mux3~0_combout\ & (\regs_i|x\(3))) # (!\alu_i|Mux3~0_combout\ & ((\alu_i|Add1~8_combout\))))) # (!\alu_i|Mux0~0_combout\ & (((\alu_i|Mux3~0_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011101111000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|x\(3),
	datab => \alu_i|Mux0~0_combout\,
	datac => \alu_i|Add1~8_combout\,
	datad => \alu_i|Mux3~0_combout\,
	combout => \alu_i|Mux3~1_combout\);

-- Location: LCCOMB_X26_Y16_N18
\regs_i|data[4]~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[4]~0_combout\ = (\alu_i|Mux1~2_combout\ & (\alu_i|Mux3~2_combout\)) # (!\alu_i|Mux1~2_combout\ & ((\alu_i|Mux3~1_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110110001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \alu_i|Mux1~2_combout\,
	datab => \alu_i|Mux3~2_combout\,
	datad => \alu_i|Mux3~1_combout\,
	combout => \regs_i|data[4]~0_combout\);

-- Location: LCCOMB_X26_Y16_N0
\regs_i|r~13\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r~13_combout\ = (\regs_i|page~q\ & ((\regs_i|data[4]~0_combout\))) # (!\regs_i|page~q\ & (\regs_i|u_key|val\(0)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111101001010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|page~q\,
	datac => \regs_i|u_key|val\(0),
	datad => \regs_i|data[4]~0_combout\,
	combout => \regs_i|r~13_combout\);

-- Location: LCCOMB_X25_Y16_N30
\regs_i|r[1][4]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[1][4]~feeder_combout\ = \regs_i|r~13_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \regs_i|r~13_combout\,
	combout => \regs_i|r[1][4]~feeder_combout\);

-- Location: FF_X25_Y16_N31
\regs_i|r[1][4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|r[1][4]~feeder_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|r[1][4]~4_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[1][4]~q\);

-- Location: LCCOMB_X25_Y17_N8
\regs_i|x~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|x~6_combout\ = (\m[0]~input_o\ & ((\regs_i|r[2][4]~q\) # ((\remain[3]~input_o\)))) # (!\m[0]~input_o\ & (((!\remain[3]~input_o\ & \regs_i|r[0][4]~q\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010110110101000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \m[0]~input_o\,
	datab => \regs_i|r[2][4]~q\,
	datac => \remain[3]~input_o\,
	datad => \regs_i|r[0][4]~q\,
	combout => \regs_i|x~6_combout\);

-- Location: LCCOMB_X25_Y16_N22
\regs_i|x~7\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|x~7_combout\ = (\remain[3]~input_o\ & ((\regs_i|x~6_combout\ & ((\regs_i|r[3][4]~q\))) # (!\regs_i|x~6_combout\ & (\regs_i|r[1][4]~q\)))) # (!\remain[3]~input_o\ & (((\regs_i|x~6_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111100001011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \remain[3]~input_o\,
	datab => \regs_i|r[1][4]~q\,
	datac => \regs_i|x~6_combout\,
	datad => \regs_i|r[3][4]~q\,
	combout => \regs_i|x~7_combout\);

-- Location: LCCOMB_X29_Y16_N2
\regs_i|x[4]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|x[4]~feeder_combout\ = \regs_i|x~7_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \regs_i|x~7_combout\,
	combout => \regs_i|x[4]~feeder_combout\);

-- Location: FF_X29_Y16_N3
\regs_i|x[4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|x[4]~feeder_combout\,
	asdata => \regs_i|pc\(4),
	clrn => \rst~inputclkctrl_outclk\,
	sload => \m[1]~input_o\,
	ena => \regs_i|page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|x\(4));

-- Location: LCCOMB_X29_Y16_N12
\alu_i|Mux4~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Mux4~0_combout\ = (\alu_i|Mux1~1_combout\ & (((\regs_i|x\(4))) # (!\alu_i|Mux1~0_combout\))) # (!\alu_i|Mux1~1_combout\ & (\alu_i|Mux1~0_combout\ & (\alu_i|res~3_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110101001100010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \alu_i|Mux1~1_combout\,
	datab => \alu_i|Mux1~0_combout\,
	datac => \alu_i|res~3_combout\,
	datad => \regs_i|x\(4),
	combout => \alu_i|Mux4~0_combout\);

-- Location: LCCOMB_X27_Y16_N2
\alu_i|Mux4~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Mux4~1_combout\ = (\alu_i|Mux0~0_combout\ & ((\alu_i|Mux4~0_combout\ & (\regs_i|x\(2))) # (!\alu_i|Mux4~0_combout\ & ((\alu_i|Add1~6_combout\))))) # (!\alu_i|Mux0~0_combout\ & (((\alu_i|Mux4~0_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101101011010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \alu_i|Mux0~0_combout\,
	datab => \regs_i|x\(2),
	datac => \alu_i|Mux4~0_combout\,
	datad => \alu_i|Add1~6_combout\,
	combout => \alu_i|Mux4~1_combout\);

-- Location: LCCOMB_X27_Y16_N24
\regs_i|data[3]~7\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[3]~7_combout\ = (\alu_i|Mux1~2_combout\ & (\alu_i|Mux4~2_combout\)) # (!\alu_i|Mux1~2_combout\ & ((\alu_i|Mux4~1_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110110001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \alu_i|Mux1~2_combout\,
	datab => \alu_i|Mux4~2_combout\,
	datad => \alu_i|Mux4~1_combout\,
	combout => \regs_i|data[3]~7_combout\);

-- Location: LCCOMB_X26_Y15_N14
\regs_i|r~14\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r~14_combout\ = (\regs_i|page~q\ & ((\regs_i|data[3]~7_combout\))) # (!\regs_i|page~q\ & (\regs_i|u_key|val\(3)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110000001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|u_key|val\(3),
	datac => \regs_i|page~q\,
	datad => \regs_i|data[3]~7_combout\,
	combout => \regs_i|r~14_combout\);

-- Location: LCCOMB_X26_Y15_N24
\regs_i|r[1][3]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[1][3]~feeder_combout\ = \regs_i|r~14_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \regs_i|r~14_combout\,
	combout => \regs_i|r[1][3]~feeder_combout\);

-- Location: FF_X26_Y15_N25
\regs_i|r[1][3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|r[1][3]~feeder_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|r[1][3]~15_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[1][3]~q\);

-- Location: LCCOMB_X26_Y17_N10
\regs_i|x~8\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|x~8_combout\ = (\m[0]~input_o\ & ((\remain[3]~input_o\) # ((\regs_i|r[2][3]~q\)))) # (!\m[0]~input_o\ & (!\remain[3]~input_o\ & (\regs_i|r[0][3]~q\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011101010011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \m[0]~input_o\,
	datab => \remain[3]~input_o\,
	datac => \regs_i|r[0][3]~q\,
	datad => \regs_i|r[2][3]~q\,
	combout => \regs_i|x~8_combout\);

-- Location: LCCOMB_X26_Y17_N8
\regs_i|x~9\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|x~9_combout\ = (\remain[3]~input_o\ & ((\regs_i|x~8_combout\ & ((\regs_i|r[3][3]~q\))) # (!\regs_i|x~8_combout\ & (\regs_i|r[1][3]~q\)))) # (!\remain[3]~input_o\ & (((\regs_i|x~8_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100111110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|r[1][3]~q\,
	datab => \regs_i|r[3][3]~q\,
	datac => \remain[3]~input_o\,
	datad => \regs_i|x~8_combout\,
	combout => \regs_i|x~9_combout\);

-- Location: LCCOMB_X28_Y16_N8
\regs_i|x[3]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|x[3]~feeder_combout\ = \regs_i|x~9_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \regs_i|x~9_combout\,
	combout => \regs_i|x[3]~feeder_combout\);

-- Location: FF_X28_Y16_N9
\regs_i|x[3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|x[3]~feeder_combout\,
	asdata => \regs_i|pc\(3),
	clrn => \rst~inputclkctrl_outclk\,
	sload => \m[1]~input_o\,
	ena => \regs_i|page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|x\(3));

-- Location: LCCOMB_X28_Y15_N12
\alu_i|Mux5~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Mux5~0_combout\ = (\alu_i|Mux1~1_combout\ & (((\regs_i|x\(3))) # (!\alu_i|Mux1~0_combout\))) # (!\alu_i|Mux1~1_combout\ & (\alu_i|Mux1~0_combout\ & (\alu_i|res~2_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110101001100010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \alu_i|Mux1~1_combout\,
	datab => \alu_i|Mux1~0_combout\,
	datac => \alu_i|res~2_combout\,
	datad => \regs_i|x\(3),
	combout => \alu_i|Mux5~0_combout\);

-- Location: LCCOMB_X28_Y15_N2
\alu_i|Mux5~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Mux5~1_combout\ = (\alu_i|Mux5~0_combout\ & (((\regs_i|x\(1))) # (!\alu_i|Mux0~0_combout\))) # (!\alu_i|Mux5~0_combout\ & (\alu_i|Mux0~0_combout\ & (\alu_i|Add1~4_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110101001100010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \alu_i|Mux5~0_combout\,
	datab => \alu_i|Mux0~0_combout\,
	datac => \alu_i|Add1~4_combout\,
	datad => \regs_i|x\(1),
	combout => \alu_i|Mux5~1_combout\);

-- Location: LCCOMB_X28_Y15_N26
\regs_i|data[2]~5\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[2]~5_combout\ = (\alu_i|Mux1~2_combout\ & (\alu_i|Mux5~2_combout\)) # (!\alu_i|Mux1~2_combout\ & ((\alu_i|Mux5~1_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110110001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \alu_i|Mux1~2_combout\,
	datab => \alu_i|Mux5~2_combout\,
	datad => \alu_i|Mux5~1_combout\,
	combout => \regs_i|data[2]~5_combout\);

-- Location: LCCOMB_X27_Y15_N12
\regs_i|r~19\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r~19_combout\ = (\regs_i|page~q\ & ((\regs_i|data[2]~5_combout\))) # (!\regs_i|page~q\ & (\regs_i|u_key|val\(2)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110000001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|u_key|val\(2),
	datac => \regs_i|page~q\,
	datad => \regs_i|data[2]~5_combout\,
	combout => \regs_i|r~19_combout\);

-- Location: LCCOMB_X26_Y15_N20
\regs_i|r[1][2]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[1][2]~feeder_combout\ = \regs_i|r~19_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \regs_i|r~19_combout\,
	combout => \regs_i|r[1][2]~feeder_combout\);

-- Location: FF_X26_Y15_N21
\regs_i|r[1][2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|r[1][2]~feeder_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|r[1][3]~15_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[1][2]~q\);

-- Location: LCCOMB_X25_Y15_N2
\regs_i|x~10\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|x~10_combout\ = (\m[0]~input_o\ & ((\regs_i|r[2][2]~q\) # ((\remain[3]~input_o\)))) # (!\m[0]~input_o\ & (((\regs_i|r[0][2]~q\ & !\remain[3]~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000010101100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|r[2][2]~q\,
	datab => \regs_i|r[0][2]~q\,
	datac => \m[0]~input_o\,
	datad => \remain[3]~input_o\,
	combout => \regs_i|x~10_combout\);

-- Location: LCCOMB_X25_Y15_N20
\regs_i|x~11\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|x~11_combout\ = (\regs_i|x~10_combout\ & (((\regs_i|r[3][2]~q\) # (!\remain[3]~input_o\)))) # (!\regs_i|x~10_combout\ & (\regs_i|r[1][2]~q\ & ((\remain[3]~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110001011001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|r[1][2]~q\,
	datab => \regs_i|x~10_combout\,
	datac => \regs_i|r[3][2]~q\,
	datad => \remain[3]~input_o\,
	combout => \regs_i|x~11_combout\);

-- Location: LCCOMB_X28_Y16_N2
\regs_i|x[2]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|x[2]~feeder_combout\ = \regs_i|x~11_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \regs_i|x~11_combout\,
	combout => \regs_i|x[2]~feeder_combout\);

-- Location: FF_X28_Y16_N3
\regs_i|x[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|x[2]~feeder_combout\,
	asdata => \regs_i|pc\(2),
	clrn => \rst~inputclkctrl_outclk\,
	sload => \m[1]~input_o\,
	ena => \regs_i|page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|x\(2));

-- Location: LCCOMB_X28_Y15_N18
\alu_i|res~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|res~1_combout\ = (\regs_i|x\(1) & \regs_i|y\(1))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100110000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|x\(1),
	datad => \regs_i|y\(1),
	combout => \alu_i|res~1_combout\);

-- Location: LCCOMB_X28_Y15_N24
\alu_i|Mux6~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Mux6~0_combout\ = (\alu_i|Mux1~1_combout\ & (((\regs_i|x\(2))) # (!\alu_i|Mux1~0_combout\))) # (!\alu_i|Mux1~1_combout\ & (\alu_i|Mux1~0_combout\ & ((\alu_i|res~1_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110011010100010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \alu_i|Mux1~1_combout\,
	datab => \alu_i|Mux1~0_combout\,
	datac => \regs_i|x\(2),
	datad => \alu_i|res~1_combout\,
	combout => \alu_i|Mux6~0_combout\);

-- Location: LCCOMB_X28_Y15_N10
\alu_i|Mux6~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Mux6~1_combout\ = (\alu_i|Mux0~0_combout\ & ((\alu_i|Mux6~0_combout\ & (\regs_i|x\(0))) # (!\alu_i|Mux6~0_combout\ & ((\alu_i|Add1~2_combout\))))) # (!\alu_i|Mux0~0_combout\ & (\alu_i|Mux6~0_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110011011000100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \alu_i|Mux0~0_combout\,
	datab => \alu_i|Mux6~0_combout\,
	datac => \regs_i|x\(0),
	datad => \alu_i|Add1~2_combout\,
	combout => \alu_i|Mux6~1_combout\);

-- Location: LCCOMB_X28_Y15_N28
\regs_i|data[1]~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[1]~3_combout\ = (\alu_i|Mux1~2_combout\ & (\alu_i|Mux6~2_combout\)) # (!\alu_i|Mux1~2_combout\ & ((\alu_i|Mux6~1_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110110001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \alu_i|Mux1~2_combout\,
	datab => \alu_i|Mux6~2_combout\,
	datad => \alu_i|Mux6~1_combout\,
	combout => \regs_i|data[1]~3_combout\);

-- Location: LCCOMB_X27_Y15_N8
\regs_i|r~20\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r~20_combout\ = (\regs_i|page~q\ & ((\regs_i|data[1]~3_combout\))) # (!\regs_i|page~q\ & (\regs_i|u_key|val\(1)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111101000001010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_key|val\(1),
	datac => \regs_i|page~q\,
	datad => \regs_i|data[1]~3_combout\,
	combout => \regs_i|r~20_combout\);

-- Location: FF_X25_Y15_N23
\regs_i|r[0][1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	asdata => \regs_i|r~20_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => VCC,
	ena => \regs_i|r[0][2]~17_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[0][1]~q\);

-- Location: LCCOMB_X25_Y15_N12
\regs_i|x~12\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|x~12_combout\ = (\m[0]~input_o\ & (((\remain[3]~input_o\)))) # (!\m[0]~input_o\ & ((\remain[3]~input_o\ & ((\regs_i|r[1][1]~q\))) # (!\remain[3]~input_o\ & (\regs_i|r[0][1]~q\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110000001010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|r[0][1]~q\,
	datab => \regs_i|r[1][1]~q\,
	datac => \m[0]~input_o\,
	datad => \remain[3]~input_o\,
	combout => \regs_i|x~12_combout\);

-- Location: LCCOMB_X25_Y15_N10
\regs_i|x~13\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|x~13_combout\ = (\regs_i|x~12_combout\ & ((\regs_i|r[3][1]~q\) # ((!\m[0]~input_o\)))) # (!\regs_i|x~12_combout\ & (((\m[0]~input_o\ & \regs_i|r[2][1]~q\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101101010001010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|x~12_combout\,
	datab => \regs_i|r[3][1]~q\,
	datac => \m[0]~input_o\,
	datad => \regs_i|r[2][1]~q\,
	combout => \regs_i|x~13_combout\);

-- Location: LCCOMB_X29_Y16_N4
\regs_i|x[1]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|x[1]~feeder_combout\ = \regs_i|x~13_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \regs_i|x~13_combout\,
	combout => \regs_i|x[1]~feeder_combout\);

-- Location: FF_X29_Y16_N5
\regs_i|x[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|x[1]~feeder_combout\,
	asdata => \regs_i|pc\(1),
	clrn => \rst~inputclkctrl_outclk\,
	sload => \m[1]~input_o\,
	ena => \regs_i|page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|x\(1));

-- Location: LCCOMB_X26_Y16_N22
\alu_i|Mux7~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Mux7~2_combout\ = (\key_sel[1]~input_o\ & (((\alu_i|Add0~0_combout\)))) # (!\key_sel[1]~input_o\ & ((\regs_i|y\(0)) # ((\regs_i|x\(0)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010111100100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \key_sel[1]~input_o\,
	datab => \regs_i|y\(0),
	datac => \alu_i|Add0~0_combout\,
	datad => \regs_i|x\(0),
	combout => \alu_i|Mux7~2_combout\);

-- Location: LCCOMB_X26_Y16_N12
\alu_i|Mux7~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Mux7~3_combout\ = (\rd~input_o\ & (\regs_i|x\(1))) # (!\rd~input_o\ & ((\alu_i|Mux7~2_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101100011011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \rd~input_o\,
	datab => \regs_i|x\(1),
	datac => \alu_i|Mux7~2_combout\,
	combout => \alu_i|Mux7~3_combout\);

-- Location: LCCOMB_X26_Y16_N14
\alu_i|Mux7~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Mux7~0_combout\ = (!\rd~input_o\ & (\regs_i|y\(0) & (\key_sel[1]~input_o\ & \regs_i|x\(0))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0100000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \rd~input_o\,
	datab => \regs_i|y\(0),
	datac => \key_sel[1]~input_o\,
	datad => \regs_i|x\(0),
	combout => \alu_i|Mux7~0_combout\);

-- Location: LCCOMB_X26_Y16_N28
\alu_i|Mux7~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Mux7~1_combout\ = (\alu_i|Mux7~0_combout\) # ((\rd~input_o\ & (!\key_sel[1]~input_o\ & \alu_i|Add1~0_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \rd~input_o\,
	datab => \key_sel[1]~input_o\,
	datac => \alu_i|Mux7~0_combout\,
	datad => \alu_i|Add1~0_combout\,
	combout => \alu_i|Mux7~1_combout\);

-- Location: LCCOMB_X26_Y16_N8
\regs_i|data[0]~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[0]~1_combout\ = (\key_sel[0]~input_o\ & (\alu_i|Mux7~3_combout\)) # (!\key_sel[0]~input_o\ & ((\alu_i|Mux7~1_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011101110001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \alu_i|Mux7~3_combout\,
	datab => \key_sel[0]~input_o\,
	datad => \alu_i|Mux7~1_combout\,
	combout => \regs_i|data[0]~1_combout\);

-- Location: LCCOMB_X27_Y15_N30
\regs_i|pc~33\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~33_combout\ = (\regs_i|pc[7]~3_combout\ & ((\regs_i|pc~32_combout\ & (\regs_i|u_key|val\(0))) # (!\regs_i|pc~32_combout\ & ((\regs_i|data[0]~1_combout\))))) # (!\regs_i|pc[7]~3_combout\ & (((\regs_i|pc~32_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101101011010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|pc[7]~3_combout\,
	datab => \regs_i|u_key|val\(0),
	datac => \regs_i|pc~32_combout\,
	datad => \regs_i|data[0]~1_combout\,
	combout => \regs_i|pc~33_combout\);

-- Location: LCCOMB_X27_Y15_N10
\regs_i|pc~34\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~34_combout\ = (\regs_i|pc~33_combout\ & ((\m[1]~input_o\) # ((\regs_i|page~q\) # (\m[0]~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000011100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \m[1]~input_o\,
	datab => \regs_i|page~q\,
	datac => \regs_i|pc~33_combout\,
	datad => \m[0]~input_o\,
	combout => \regs_i|pc~34_combout\);

-- Location: LCCOMB_X27_Y17_N16
\regs_i|always2~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|always2~0_combout\ = (\key_sel[0]~input_o\ & \regs_i|u_key|is_pressed~q\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \key_sel[0]~input_o\,
	datad => \regs_i|u_key|is_pressed~q\,
	combout => \regs_i|always2~0_combout\);

-- Location: LCCOMB_X27_Y17_N14
\regs_i|pc[1]~24\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc[1]~24_combout\ = (\m[0]~input_o\ & (!\m[1]~input_o\ & ((!\regs_i|always2~0_combout\) # (!\key_sel[1]~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000001000100010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \m[0]~input_o\,
	datab => \m[1]~input_o\,
	datac => \key_sel[1]~input_o\,
	datad => \regs_i|always2~0_combout\,
	combout => \regs_i|pc[1]~24_combout\);

-- Location: LCCOMB_X26_Y16_N4
\regs_i|pc[7]~7\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc[7]~7_combout\ = (\regs_i|page~q\ & ((\is_write~input_o\) # (!\ra[1]~input_o\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011000010110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \is_write~input_o\,
	datab => \ra[1]~input_o\,
	datac => \regs_i|page~q\,
	combout => \regs_i|pc[7]~7_combout\);

-- Location: LCCOMB_X23_Y16_N16
\regs_i|Add1~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add1~0_combout\ = \regs_i|cnt\(0) $ (VCC)
-- \regs_i|Add1~1\ = CARRY(\regs_i|cnt\(0))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011001111001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|cnt\(0),
	datad => VCC,
	combout => \regs_i|Add1~0_combout\,
	cout => \regs_i|Add1~1\);

-- Location: LCCOMB_X29_Y15_N26
\regs_i|cnt[0]~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|cnt[0]~0_combout\ = (\regs_i|page~q\ & (\regs_i|is_down~q\ $ (((\regs_i|is_up~q\))))) # (!\regs_i|page~q\ & (((\m[1]~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101110010101100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|is_down~q\,
	datab => \m[1]~input_o\,
	datac => \regs_i|page~q\,
	datad => \regs_i|is_up~q\,
	combout => \regs_i|cnt[0]~0_combout\);

-- Location: FF_X23_Y16_N17
\regs_i|cnt[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|Add1~0_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|cnt[0]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|cnt\(0));

-- Location: LCCOMB_X23_Y16_N18
\regs_i|Add1~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add1~2_combout\ = (\regs_i|cnt\(1) & (!\regs_i|Add1~1\)) # (!\regs_i|cnt\(1) & ((\regs_i|Add1~1\) # (GND)))
-- \regs_i|Add1~3\ = CARRY((!\regs_i|Add1~1\) # (!\regs_i|cnt\(1)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|cnt\(1),
	datad => VCC,
	cin => \regs_i|Add1~1\,
	combout => \regs_i|Add1~2_combout\,
	cout => \regs_i|Add1~3\);

-- Location: FF_X23_Y16_N19
\regs_i|cnt[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|Add1~2_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|cnt[0]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|cnt\(1));

-- Location: LCCOMB_X23_Y16_N20
\regs_i|Add1~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add1~4_combout\ = (\regs_i|cnt\(2) & (\regs_i|Add1~3\ $ (GND))) # (!\regs_i|cnt\(2) & (!\regs_i|Add1~3\ & VCC))
-- \regs_i|Add1~5\ = CARRY((\regs_i|cnt\(2) & !\regs_i|Add1~3\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010010100001010",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|cnt\(2),
	datad => VCC,
	cin => \regs_i|Add1~3\,
	combout => \regs_i|Add1~4_combout\,
	cout => \regs_i|Add1~5\);

-- Location: FF_X23_Y16_N21
\regs_i|cnt[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|Add1~4_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|cnt[0]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|cnt\(2));

-- Location: LCCOMB_X23_Y16_N22
\regs_i|Add1~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add1~6_combout\ = (\regs_i|cnt\(3) & (!\regs_i|Add1~5\)) # (!\regs_i|cnt\(3) & ((\regs_i|Add1~5\) # (GND)))
-- \regs_i|Add1~7\ = CARRY((!\regs_i|Add1~5\) # (!\regs_i|cnt\(3)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|cnt\(3),
	datad => VCC,
	cin => \regs_i|Add1~5\,
	combout => \regs_i|Add1~6_combout\,
	cout => \regs_i|Add1~7\);

-- Location: FF_X23_Y16_N23
\regs_i|cnt[3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|Add1~6_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|cnt[0]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|cnt\(3));

-- Location: LCCOMB_X23_Y16_N24
\regs_i|Add1~8\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add1~8_combout\ = (\regs_i|cnt\(4) & (\regs_i|Add1~7\ $ (GND))) # (!\regs_i|cnt\(4) & (!\regs_i|Add1~7\ & VCC))
-- \regs_i|Add1~9\ = CARRY((\regs_i|cnt\(4) & !\regs_i|Add1~7\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|cnt\(4),
	datad => VCC,
	cin => \regs_i|Add1~7\,
	combout => \regs_i|Add1~8_combout\,
	cout => \regs_i|Add1~9\);

-- Location: FF_X23_Y16_N25
\regs_i|cnt[4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|Add1~8_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|cnt[0]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|cnt\(4));

-- Location: LCCOMB_X23_Y16_N6
\regs_i|Equal1~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Equal1~4_combout\ = (((!\regs_i|cnt\(1)) # (!\regs_i|cnt\(2))) # (!\regs_i|cnt\(4))) # (!\regs_i|cnt\(3))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0111111111111111",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|cnt\(3),
	datab => \regs_i|cnt\(4),
	datac => \regs_i|cnt\(2),
	datad => \regs_i|cnt\(1),
	combout => \regs_i|Equal1~4_combout\);

-- Location: LCCOMB_X23_Y16_N26
\regs_i|Add1~10\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add1~10_combout\ = (\regs_i|cnt\(5) & (!\regs_i|Add1~9\)) # (!\regs_i|cnt\(5) & ((\regs_i|Add1~9\) # (GND)))
-- \regs_i|Add1~11\ = CARRY((!\regs_i|Add1~9\) # (!\regs_i|cnt\(5)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|cnt\(5),
	datad => VCC,
	cin => \regs_i|Add1~9\,
	combout => \regs_i|Add1~10_combout\,
	cout => \regs_i|Add1~11\);

-- Location: LCCOMB_X23_Y16_N8
\regs_i|cnt~5\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|cnt~5_combout\ = (\regs_i|Add1~10_combout\ & \regs_i|Equal1~5_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \regs_i|Add1~10_combout\,
	datad => \regs_i|Equal1~5_combout\,
	combout => \regs_i|cnt~5_combout\);

-- Location: FF_X23_Y16_N9
\regs_i|cnt[5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|cnt~5_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|cnt[0]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|cnt\(5));

-- Location: LCCOMB_X23_Y16_N28
\regs_i|Add1~12\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add1~12_combout\ = (\regs_i|cnt\(6) & (\regs_i|Add1~11\ $ (GND))) # (!\regs_i|cnt\(6) & (!\regs_i|Add1~11\ & VCC))
-- \regs_i|Add1~13\ = CARRY((\regs_i|cnt\(6) & !\regs_i|Add1~11\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|cnt\(6),
	datad => VCC,
	cin => \regs_i|Add1~11\,
	combout => \regs_i|Add1~12_combout\,
	cout => \regs_i|Add1~13\);

-- Location: FF_X23_Y16_N29
\regs_i|cnt[6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|Add1~12_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|cnt[0]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|cnt\(6));

-- Location: LCCOMB_X23_Y16_N30
\regs_i|Add1~14\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add1~14_combout\ = (\regs_i|cnt\(7) & (!\regs_i|Add1~13\)) # (!\regs_i|cnt\(7) & ((\regs_i|Add1~13\) # (GND)))
-- \regs_i|Add1~15\ = CARRY((!\regs_i|Add1~13\) # (!\regs_i|cnt\(7)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|cnt\(7),
	datad => VCC,
	cin => \regs_i|Add1~13\,
	combout => \regs_i|Add1~14_combout\,
	cout => \regs_i|Add1~15\);

-- Location: LCCOMB_X23_Y16_N14
\regs_i|cnt~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|cnt~6_combout\ = (\regs_i|Add1~14_combout\ & \regs_i|Equal1~5_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \regs_i|Add1~14_combout\,
	datad => \regs_i|Equal1~5_combout\,
	combout => \regs_i|cnt~6_combout\);

-- Location: FF_X23_Y16_N15
\regs_i|cnt[7]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|cnt~6_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|cnt[0]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|cnt\(7));

-- Location: LCCOMB_X23_Y15_N0
\regs_i|Add1~16\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add1~16_combout\ = (\regs_i|cnt\(8) & (\regs_i|Add1~15\ $ (GND))) # (!\regs_i|cnt\(8) & (!\regs_i|Add1~15\ & VCC))
-- \regs_i|Add1~17\ = CARRY((\regs_i|cnt\(8) & !\regs_i|Add1~15\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|cnt\(8),
	datad => VCC,
	cin => \regs_i|Add1~15\,
	combout => \regs_i|Add1~16_combout\,
	cout => \regs_i|Add1~17\);

-- Location: FF_X23_Y15_N1
\regs_i|cnt[8]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|Add1~16_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|cnt[0]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|cnt\(8));

-- Location: LCCOMB_X23_Y16_N4
\regs_i|Equal1~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Equal1~3_combout\ = (\regs_i|cnt\(8)) # (((\regs_i|cnt\(5)) # (\regs_i|cnt\(6))) # (!\regs_i|cnt\(7)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111111111011",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|cnt\(8),
	datab => \regs_i|cnt\(7),
	datac => \regs_i|cnt\(5),
	datad => \regs_i|cnt\(6),
	combout => \regs_i|Equal1~3_combout\);

-- Location: LCCOMB_X23_Y15_N2
\regs_i|Add1~18\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add1~18_combout\ = (\regs_i|cnt\(9) & (!\regs_i|Add1~17\)) # (!\regs_i|cnt\(9) & ((\regs_i|Add1~17\) # (GND)))
-- \regs_i|Add1~19\ = CARRY((!\regs_i|Add1~17\) # (!\regs_i|cnt\(9)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|cnt\(9),
	datad => VCC,
	cin => \regs_i|Add1~17\,
	combout => \regs_i|Add1~18_combout\,
	cout => \regs_i|Add1~19\);

-- Location: LCCOMB_X23_Y15_N18
\regs_i|cnt~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|cnt~2_combout\ = (\regs_i|Equal1~5_combout\ & \regs_i|Add1~18_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \regs_i|Equal1~5_combout\,
	datad => \regs_i|Add1~18_combout\,
	combout => \regs_i|cnt~2_combout\);

-- Location: FF_X23_Y15_N19
\regs_i|cnt[9]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|cnt~2_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|cnt[0]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|cnt\(9));

-- Location: LCCOMB_X23_Y15_N4
\regs_i|Add1~20\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add1~20_combout\ = (\regs_i|cnt\(10) & (\regs_i|Add1~19\ $ (GND))) # (!\regs_i|cnt\(10) & (!\regs_i|Add1~19\ & VCC))
-- \regs_i|Add1~21\ = CARRY((\regs_i|cnt\(10) & !\regs_i|Add1~19\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|cnt\(10),
	datad => VCC,
	cin => \regs_i|Add1~19\,
	combout => \regs_i|Add1~20_combout\,
	cout => \regs_i|Add1~21\);

-- Location: LCCOMB_X23_Y15_N24
\regs_i|cnt~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|cnt~1_combout\ = (\regs_i|Add1~20_combout\ & \regs_i|Equal1~5_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100000011000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|Add1~20_combout\,
	datac => \regs_i|Equal1~5_combout\,
	combout => \regs_i|cnt~1_combout\);

-- Location: FF_X23_Y15_N25
\regs_i|cnt[10]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|cnt~1_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|cnt[0]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|cnt\(10));

-- Location: LCCOMB_X23_Y15_N6
\regs_i|Add1~22\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add1~22_combout\ = (\regs_i|cnt\(11) & (!\regs_i|Add1~21\)) # (!\regs_i|cnt\(11) & ((\regs_i|Add1~21\) # (GND)))
-- \regs_i|Add1~23\ = CARRY((!\regs_i|Add1~21\) # (!\regs_i|cnt\(11)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|cnt\(11),
	datad => VCC,
	cin => \regs_i|Add1~21\,
	combout => \regs_i|Add1~22_combout\,
	cout => \regs_i|Add1~23\);

-- Location: FF_X23_Y15_N7
\regs_i|cnt[11]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|Add1~22_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|cnt[0]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|cnt\(11));

-- Location: LCCOMB_X23_Y15_N8
\regs_i|Add1~24\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add1~24_combout\ = (\regs_i|cnt\(12) & (\regs_i|Add1~23\ $ (GND))) # (!\regs_i|cnt\(12) & (!\regs_i|Add1~23\ & VCC))
-- \regs_i|Add1~25\ = CARRY((\regs_i|cnt\(12) & !\regs_i|Add1~23\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|cnt\(12),
	datad => VCC,
	cin => \regs_i|Add1~23\,
	combout => \regs_i|Add1~24_combout\,
	cout => \regs_i|Add1~25\);

-- Location: FF_X23_Y15_N9
\regs_i|cnt[12]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|Add1~24_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|cnt[0]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|cnt\(12));

-- Location: LCCOMB_X23_Y15_N10
\regs_i|Add1~26\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add1~26_combout\ = (\regs_i|cnt\(13) & (!\regs_i|Add1~25\)) # (!\regs_i|cnt\(13) & ((\regs_i|Add1~25\) # (GND)))
-- \regs_i|Add1~27\ = CARRY((!\regs_i|Add1~25\) # (!\regs_i|cnt\(13)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|cnt\(13),
	datad => VCC,
	cin => \regs_i|Add1~25\,
	combout => \regs_i|Add1~26_combout\,
	cout => \regs_i|Add1~27\);

-- Location: FF_X23_Y15_N11
\regs_i|cnt[13]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|Add1~26_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|cnt[0]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|cnt\(13));

-- Location: LCCOMB_X23_Y15_N12
\regs_i|Add1~28\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add1~28_combout\ = (\regs_i|cnt\(14) & (\regs_i|Add1~27\ $ (GND))) # (!\regs_i|cnt\(14) & (!\regs_i|Add1~27\ & VCC))
-- \regs_i|Add1~29\ = CARRY((\regs_i|cnt\(14) & !\regs_i|Add1~27\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010010100001010",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|cnt\(14),
	datad => VCC,
	cin => \regs_i|Add1~27\,
	combout => \regs_i|Add1~28_combout\,
	cout => \regs_i|Add1~29\);

-- Location: FF_X23_Y15_N13
\regs_i|cnt[14]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|Add1~28_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|cnt[0]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|cnt\(14));

-- Location: LCCOMB_X23_Y15_N14
\regs_i|Add1~30\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add1~30_combout\ = (\regs_i|cnt\(15) & (!\regs_i|Add1~29\)) # (!\regs_i|cnt\(15) & ((\regs_i|Add1~29\) # (GND)))
-- \regs_i|Add1~31\ = CARRY((!\regs_i|Add1~29\) # (!\regs_i|cnt\(15)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|cnt\(15),
	datad => VCC,
	cin => \regs_i|Add1~29\,
	combout => \regs_i|Add1~30_combout\,
	cout => \regs_i|Add1~31\);

-- Location: LCCOMB_X23_Y15_N20
\regs_i|cnt~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|cnt~4_combout\ = (\regs_i|Equal1~5_combout\ & \regs_i|Add1~30_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010000010100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|Equal1~5_combout\,
	datac => \regs_i|Add1~30_combout\,
	combout => \regs_i|cnt~4_combout\);

-- Location: FF_X23_Y15_N21
\regs_i|cnt[15]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|cnt~4_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|cnt[0]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|cnt\(15));

-- Location: LCCOMB_X23_Y15_N16
\regs_i|Add1~32\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add1~32_combout\ = \regs_i|cnt\(16) $ (!\regs_i|Add1~31\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010010110100101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|cnt\(16),
	cin => \regs_i|Add1~31\,
	combout => \regs_i|Add1~32_combout\);

-- Location: LCCOMB_X23_Y15_N26
\regs_i|cnt~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|cnt~3_combout\ = (\regs_i|Equal1~5_combout\ & \regs_i|Add1~32_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \regs_i|Equal1~5_combout\,
	datad => \regs_i|Add1~32_combout\,
	combout => \regs_i|cnt~3_combout\);

-- Location: FF_X23_Y15_N27
\regs_i|cnt[16]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|cnt~3_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|cnt[0]~0_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|cnt\(16));

-- Location: LCCOMB_X23_Y15_N22
\regs_i|Equal1~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Equal1~0_combout\ = (\regs_i|cnt\(13)) # (\regs_i|cnt\(14))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111110101010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|cnt\(13),
	datad => \regs_i|cnt\(14),
	combout => \regs_i|Equal1~0_combout\);

-- Location: LCCOMB_X23_Y15_N28
\regs_i|Equal1~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Equal1~1_combout\ = (\regs_i|cnt\(11)) # (((\regs_i|cnt\(12)) # (!\regs_i|cnt\(9))) # (!\regs_i|cnt\(10)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111101111111111",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|cnt\(11),
	datab => \regs_i|cnt\(10),
	datac => \regs_i|cnt\(12),
	datad => \regs_i|cnt\(9),
	combout => \regs_i|Equal1~1_combout\);

-- Location: LCCOMB_X23_Y15_N30
\regs_i|Equal1~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Equal1~2_combout\ = (((\regs_i|Equal1~0_combout\) # (\regs_i|Equal1~1_combout\)) # (!\regs_i|cnt\(15))) # (!\regs_i|cnt\(16))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111111110111",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|cnt\(16),
	datab => \regs_i|cnt\(15),
	datac => \regs_i|Equal1~0_combout\,
	datad => \regs_i|Equal1~1_combout\,
	combout => \regs_i|Equal1~2_combout\);

-- Location: LCCOMB_X23_Y16_N12
\regs_i|Equal1~5\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Equal1~5_combout\ = (\regs_i|Equal1~4_combout\) # (((\regs_i|Equal1~3_combout\) # (\regs_i|Equal1~2_combout\)) # (!\regs_i|cnt\(0)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111111111011",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|Equal1~4_combout\,
	datab => \regs_i|cnt\(0),
	datac => \regs_i|Equal1~3_combout\,
	datad => \regs_i|Equal1~2_combout\,
	combout => \regs_i|Equal1~5_combout\);

-- Location: LCCOMB_X23_Y16_N2
\regs_i|pc[7]~8\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc[7]~8_combout\ = (\regs_i|pc[7]~7_combout\ & ((\regs_i|Equal1~5_combout\) # (\regs_i|is_up~q\ $ (!\regs_i|is_down~q\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100110010000100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|is_up~q\,
	datab => \regs_i|pc[7]~7_combout\,
	datac => \regs_i|is_down~q\,
	datad => \regs_i|Equal1~5_combout\,
	combout => \regs_i|pc[7]~8_combout\);

-- Location: LCCOMB_X23_Y16_N0
\regs_i|pc[7]~9\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc[7]~9_combout\ = (\m[1]~input_o\ & \regs_i|Equal1~5_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \m[1]~input_o\,
	datad => \regs_i|Equal1~5_combout\,
	combout => \regs_i|pc[7]~9_combout\);

-- Location: LCCOMB_X27_Y15_N0
\regs_i|pc[1]~25\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc[1]~25_combout\ = (!\regs_i|pc[7]~8_combout\ & ((\regs_i|page~q\) # ((!\regs_i|pc[1]~24_combout\ & !\regs_i|pc[7]~9_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000110000001101",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|pc[1]~24_combout\,
	datab => \regs_i|page~q\,
	datac => \regs_i|pc[7]~8_combout\,
	datad => \regs_i|pc[7]~9_combout\,
	combout => \regs_i|pc[1]~25_combout\);

-- Location: FF_X27_Y15_N11
\regs_i|pc[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|pc~34_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|pc[1]~25_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|pc\(0));

-- Location: LCCOMB_X27_Y14_N8
\regs_i|Add2~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add2~2_combout\ = (\regs_i|pc\(1) & (!\regs_i|Add2~1\)) # (!\regs_i|pc\(1) & ((\regs_i|Add2~1\) # (GND)))
-- \regs_i|Add2~3\ = CARRY((!\regs_i|Add2~1\) # (!\regs_i|pc\(1)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|pc\(1),
	datad => VCC,
	cin => \regs_i|Add2~1\,
	combout => \regs_i|Add2~2_combout\,
	cout => \regs_i|Add2~3\);

-- Location: LCCOMB_X27_Y13_N14
\regs_i|Add0~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add0~2_combout\ = (\regs_i|pc\(1) & (\regs_i|Add0~1\ & VCC)) # (!\regs_i|pc\(1) & (!\regs_i|Add0~1\))
-- \regs_i|Add0~3\ = CARRY((!\regs_i|pc\(1) & !\regs_i|Add0~1\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010010100000101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|pc\(1),
	datad => VCC,
	cin => \regs_i|Add0~1\,
	combout => \regs_i|Add0~2_combout\,
	cout => \regs_i|Add0~3\);

-- Location: LCCOMB_X28_Y15_N6
\regs_i|pc~29\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~29_combout\ = (\regs_i|pc[7]~1_combout\ & (((\regs_i|pc[7]~3_combout\)))) # (!\regs_i|pc[7]~1_combout\ & ((\regs_i|pc[7]~3_combout\ & ((\regs_i|data[1]~3_combout\))) # (!\regs_i|pc[7]~3_combout\ & (\regs_i|Add0~2_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001011000010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|Add0~2_combout\,
	datab => \regs_i|pc[7]~1_combout\,
	datac => \regs_i|pc[7]~3_combout\,
	datad => \regs_i|data[1]~3_combout\,
	combout => \regs_i|pc~29_combout\);

-- Location: LCCOMB_X28_Y15_N0
\regs_i|pc~30\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~30_combout\ = (\regs_i|pc[7]~1_combout\ & ((\regs_i|pc~29_combout\ & ((\regs_i|u_key|val\(1)))) # (!\regs_i|pc~29_combout\ & (\regs_i|Add2~2_combout\)))) # (!\regs_i|pc[7]~1_combout\ & (((\regs_i|pc~29_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100111110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|Add2~2_combout\,
	datab => \regs_i|u_key|val\(1),
	datac => \regs_i|pc[7]~1_combout\,
	datad => \regs_i|pc~29_combout\,
	combout => \regs_i|pc~30_combout\);

-- Location: LCCOMB_X28_Y15_N20
\regs_i|pc~31\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~31_combout\ = (\regs_i|pc~30_combout\ & ((\m[1]~input_o\) # ((\regs_i|page~q\) # (\m[0]~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \m[1]~input_o\,
	datab => \regs_i|page~q\,
	datac => \m[0]~input_o\,
	datad => \regs_i|pc~30_combout\,
	combout => \regs_i|pc~31_combout\);

-- Location: FF_X28_Y15_N21
\regs_i|pc[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|pc~31_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|pc[1]~25_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|pc\(1));

-- Location: LCCOMB_X27_Y14_N10
\regs_i|Add2~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add2~4_combout\ = (\regs_i|pc\(2) & (\regs_i|Add2~3\ $ (GND))) # (!\regs_i|pc\(2) & (!\regs_i|Add2~3\ & VCC))
-- \regs_i|Add2~5\ = CARRY((\regs_i|pc\(2) & !\regs_i|Add2~3\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010010100001010",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|pc\(2),
	datad => VCC,
	cin => \regs_i|Add2~3\,
	combout => \regs_i|Add2~4_combout\,
	cout => \regs_i|Add2~5\);

-- Location: LCCOMB_X27_Y13_N16
\regs_i|Add0~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add0~4_combout\ = (\regs_i|pc\(2) & ((GND) # (!\regs_i|Add0~3\))) # (!\regs_i|pc\(2) & (\regs_i|Add0~3\ $ (GND)))
-- \regs_i|Add0~5\ = CARRY((\regs_i|pc\(2)) # (!\regs_i|Add0~3\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101010101111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|pc\(2),
	datad => VCC,
	cin => \regs_i|Add0~3\,
	combout => \regs_i|Add0~4_combout\,
	cout => \regs_i|Add0~5\);

-- Location: LCCOMB_X27_Y14_N26
\regs_i|pc~26\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~26_combout\ = (\regs_i|pc[7]~3_combout\ & (((\regs_i|pc[7]~1_combout\)))) # (!\regs_i|pc[7]~3_combout\ & ((\regs_i|pc[7]~1_combout\ & (\regs_i|Add2~4_combout\)) # (!\regs_i|pc[7]~1_combout\ & ((\regs_i|Add0~4_combout\)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110111000110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|Add2~4_combout\,
	datab => \regs_i|pc[7]~3_combout\,
	datac => \regs_i|Add0~4_combout\,
	datad => \regs_i|pc[7]~1_combout\,
	combout => \regs_i|pc~26_combout\);

-- Location: LCCOMB_X27_Y15_N2
\regs_i|pc~27\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~27_combout\ = (\regs_i|pc[7]~3_combout\ & ((\regs_i|pc~26_combout\ & (\regs_i|u_key|val\(2))) # (!\regs_i|pc~26_combout\ & ((\regs_i|data[2]~5_combout\))))) # (!\regs_i|pc[7]~3_combout\ & (((\regs_i|pc~26_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101101011010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|pc[7]~3_combout\,
	datab => \regs_i|u_key|val\(2),
	datac => \regs_i|pc~26_combout\,
	datad => \regs_i|data[2]~5_combout\,
	combout => \regs_i|pc~27_combout\);

-- Location: LCCOMB_X27_Y15_N26
\regs_i|pc~28\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~28_combout\ = (\regs_i|pc~27_combout\ & ((\m[1]~input_o\) # ((\m[0]~input_o\) # (\regs_i|page~q\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \m[1]~input_o\,
	datab => \m[0]~input_o\,
	datac => \regs_i|page~q\,
	datad => \regs_i|pc~27_combout\,
	combout => \regs_i|pc~28_combout\);

-- Location: FF_X27_Y15_N27
\regs_i|pc[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|pc~28_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|pc[1]~25_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|pc\(2));

-- Location: LCCOMB_X27_Y14_N12
\regs_i|Add2~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add2~6_combout\ = (\regs_i|pc\(3) & (!\regs_i|Add2~5\)) # (!\regs_i|pc\(3) & ((\regs_i|Add2~5\) # (GND)))
-- \regs_i|Add2~7\ = CARRY((!\regs_i|Add2~5\) # (!\regs_i|pc\(3)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|pc\(3),
	datad => VCC,
	cin => \regs_i|Add2~5\,
	combout => \regs_i|Add2~6_combout\,
	cout => \regs_i|Add2~7\);

-- Location: LCCOMB_X27_Y13_N18
\regs_i|Add0~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add0~6_combout\ = (\regs_i|pc\(3) & (\regs_i|Add0~5\ & VCC)) # (!\regs_i|pc\(3) & (!\regs_i|Add0~5\))
-- \regs_i|Add0~7\ = CARRY((!\regs_i|pc\(3) & !\regs_i|Add0~5\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100000011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|pc\(3),
	datad => VCC,
	cin => \regs_i|Add0~5\,
	combout => \regs_i|Add0~6_combout\,
	cout => \regs_i|Add0~7\);

-- Location: LCCOMB_X27_Y16_N28
\regs_i|pc~21\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~21_combout\ = (\regs_i|pc[7]~3_combout\ & (((\regs_i|pc[7]~1_combout\) # (\regs_i|data[3]~7_combout\)))) # (!\regs_i|pc[7]~3_combout\ & (\regs_i|Add0~6_combout\ & (!\regs_i|pc[7]~1_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100111011000010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|Add0~6_combout\,
	datab => \regs_i|pc[7]~3_combout\,
	datac => \regs_i|pc[7]~1_combout\,
	datad => \regs_i|data[3]~7_combout\,
	combout => \regs_i|pc~21_combout\);

-- Location: LCCOMB_X27_Y16_N30
\regs_i|pc~22\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~22_combout\ = (\regs_i|pc[7]~1_combout\ & ((\regs_i|pc~21_combout\ & ((\regs_i|u_key|val\(3)))) # (!\regs_i|pc~21_combout\ & (\regs_i|Add2~6_combout\)))) # (!\regs_i|pc[7]~1_combout\ & (((\regs_i|pc~21_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100111110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|Add2~6_combout\,
	datab => \regs_i|u_key|val\(3),
	datac => \regs_i|pc[7]~1_combout\,
	datad => \regs_i|pc~21_combout\,
	combout => \regs_i|pc~22_combout\);

-- Location: LCCOMB_X27_Y16_N4
\regs_i|pc~23\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~23_combout\ = (\regs_i|pc~22_combout\ & ((\regs_i|page~q\) # ((\m[1]~input_o\) # (\m[0]~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000011100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|page~q\,
	datab => \m[1]~input_o\,
	datac => \regs_i|pc~22_combout\,
	datad => \m[0]~input_o\,
	combout => \regs_i|pc~23_combout\);

-- Location: FF_X27_Y16_N5
\regs_i|pc[3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|pc~23_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|pc[1]~25_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|pc\(3));

-- Location: LCCOMB_X27_Y14_N14
\regs_i|Add2~8\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add2~8_combout\ = (\regs_i|pc\(4) & (\regs_i|Add2~7\ $ (GND))) # (!\regs_i|pc\(4) & (!\regs_i|Add2~7\ & VCC))
-- \regs_i|Add2~9\ = CARRY((\regs_i|pc\(4) & !\regs_i|Add2~7\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|pc\(4),
	datad => VCC,
	cin => \regs_i|Add2~7\,
	combout => \regs_i|Add2~8_combout\,
	cout => \regs_i|Add2~9\);

-- Location: LCCOMB_X27_Y13_N20
\regs_i|Add0~8\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add0~8_combout\ = (\regs_i|pc\(4) & ((GND) # (!\regs_i|Add0~7\))) # (!\regs_i|pc\(4) & (\regs_i|Add0~7\ $ (GND)))
-- \regs_i|Add0~9\ = CARRY((\regs_i|pc\(4)) # (!\regs_i|Add0~7\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110011001111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|pc\(4),
	datad => VCC,
	cin => \regs_i|Add0~7\,
	combout => \regs_i|Add0~8_combout\,
	cout => \regs_i|Add0~9\);

-- Location: LCCOMB_X26_Y14_N4
\regs_i|pc~18\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~18_combout\ = (\regs_i|pc[7]~3_combout\ & (((\regs_i|pc[7]~1_combout\)))) # (!\regs_i|pc[7]~3_combout\ & ((\regs_i|pc[7]~1_combout\ & (\regs_i|Add2~8_combout\)) # (!\regs_i|pc[7]~1_combout\ & ((\regs_i|Add0~8_combout\)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110010111100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|pc[7]~3_combout\,
	datab => \regs_i|Add2~8_combout\,
	datac => \regs_i|pc[7]~1_combout\,
	datad => \regs_i|Add0~8_combout\,
	combout => \regs_i|pc~18_combout\);

-- Location: LCCOMB_X26_Y14_N18
\regs_i|pc~19\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~19_combout\ = (\regs_i|pc[7]~3_combout\ & ((\regs_i|pc~18_combout\ & (\regs_i|u_key|val\(0))) # (!\regs_i|pc~18_combout\ & ((\regs_i|data[4]~0_combout\))))) # (!\regs_i|pc[7]~3_combout\ & (((\regs_i|pc~18_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101101011010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|pc[7]~3_combout\,
	datab => \regs_i|u_key|val\(0),
	datac => \regs_i|pc~18_combout\,
	datad => \regs_i|data[4]~0_combout\,
	combout => \regs_i|pc~19_combout\);

-- Location: LCCOMB_X26_Y14_N22
\regs_i|pc~20\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~20_combout\ = (\regs_i|pc~19_combout\ & ((\m[1]~input_o\) # ((\m[0]~input_o\) # (\regs_i|page~q\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \m[1]~input_o\,
	datab => \m[0]~input_o\,
	datac => \regs_i|page~q\,
	datad => \regs_i|pc~19_combout\,
	combout => \regs_i|pc~20_combout\);

-- Location: LCCOMB_X27_Y17_N10
\regs_i|pc[7]~10\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc[7]~10_combout\ = (\m[0]~input_o\ & (!\m[1]~input_o\ & ((\key_sel[1]~input_o\) # (!\regs_i|always2~0_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0010000000100010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \m[0]~input_o\,
	datab => \m[1]~input_o\,
	datac => \key_sel[1]~input_o\,
	datad => \regs_i|always2~0_combout\,
	combout => \regs_i|pc[7]~10_combout\);

-- Location: LCCOMB_X27_Y17_N0
\regs_i|pc[7]~11\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc[7]~11_combout\ = (!\regs_i|pc[7]~8_combout\ & ((\regs_i|page~q\) # ((!\regs_i|pc[7]~10_combout\ & !\regs_i|pc[7]~9_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000011001101",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|pc[7]~10_combout\,
	datab => \regs_i|page~q\,
	datac => \regs_i|pc[7]~9_combout\,
	datad => \regs_i|pc[7]~8_combout\,
	combout => \regs_i|pc[7]~11_combout\);

-- Location: FF_X26_Y14_N23
\regs_i|pc[4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|pc~20_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|pc[7]~11_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|pc\(4));

-- Location: LCCOMB_X27_Y14_N16
\regs_i|Add2~10\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add2~10_combout\ = (\regs_i|pc\(5) & (!\regs_i|Add2~9\)) # (!\regs_i|pc\(5) & ((\regs_i|Add2~9\) # (GND)))
-- \regs_i|Add2~11\ = CARRY((!\regs_i|Add2~9\) # (!\regs_i|pc\(5)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|pc\(5),
	datad => VCC,
	cin => \regs_i|Add2~9\,
	combout => \regs_i|Add2~10_combout\,
	cout => \regs_i|Add2~11\);

-- Location: LCCOMB_X27_Y13_N22
\regs_i|Add0~10\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add0~10_combout\ = (\regs_i|pc\(5) & (\regs_i|Add0~9\ & VCC)) # (!\regs_i|pc\(5) & (!\regs_i|Add0~9\))
-- \regs_i|Add0~11\ = CARRY((!\regs_i|pc\(5) & !\regs_i|Add0~9\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100000011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|pc\(5),
	datad => VCC,
	cin => \regs_i|Add0~9\,
	combout => \regs_i|Add0~10_combout\,
	cout => \regs_i|Add0~11\);

-- Location: LCCOMB_X26_Y14_N12
\regs_i|pc~15\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~15_combout\ = (\regs_i|pc[7]~3_combout\ & (((\regs_i|pc[7]~1_combout\) # (\regs_i|data[5]~2_combout\)))) # (!\regs_i|pc[7]~3_combout\ & (\regs_i|Add0~10_combout\ & (!\regs_i|pc[7]~1_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010111010100100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|pc[7]~3_combout\,
	datab => \regs_i|Add0~10_combout\,
	datac => \regs_i|pc[7]~1_combout\,
	datad => \regs_i|data[5]~2_combout\,
	combout => \regs_i|pc~15_combout\);

-- Location: LCCOMB_X26_Y14_N10
\regs_i|pc~16\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~16_combout\ = (\regs_i|pc[7]~1_combout\ & ((\regs_i|pc~15_combout\ & ((\regs_i|u_key|val\(1)))) # (!\regs_i|pc~15_combout\ & (\regs_i|Add2~10_combout\)))) # (!\regs_i|pc[7]~1_combout\ & (((\regs_i|pc~15_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010110001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|pc[7]~1_combout\,
	datab => \regs_i|Add2~10_combout\,
	datac => \regs_i|u_key|val\(1),
	datad => \regs_i|pc~15_combout\,
	combout => \regs_i|pc~16_combout\);

-- Location: LCCOMB_X26_Y14_N16
\regs_i|pc~17\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~17_combout\ = (\regs_i|pc~16_combout\ & ((\m[1]~input_o\) # ((\m[0]~input_o\) # (\regs_i|page~q\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \m[1]~input_o\,
	datab => \m[0]~input_o\,
	datac => \regs_i|page~q\,
	datad => \regs_i|pc~16_combout\,
	combout => \regs_i|pc~17_combout\);

-- Location: FF_X26_Y14_N17
\regs_i|pc[5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|pc~17_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|pc[7]~11_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|pc\(5));

-- Location: LCCOMB_X27_Y13_N24
\regs_i|Add0~12\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add0~12_combout\ = (\regs_i|pc\(6) & ((GND) # (!\regs_i|Add0~11\))) # (!\regs_i|pc\(6) & (\regs_i|Add0~11\ $ (GND)))
-- \regs_i|Add0~13\ = CARRY((\regs_i|pc\(6)) # (!\regs_i|Add0~11\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110011001111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|pc\(6),
	datad => VCC,
	cin => \regs_i|Add0~11\,
	combout => \regs_i|Add0~12_combout\,
	cout => \regs_i|Add0~13\);

-- Location: LCCOMB_X27_Y14_N18
\regs_i|Add2~12\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add2~12_combout\ = (\regs_i|pc\(6) & (\regs_i|Add2~11\ $ (GND))) # (!\regs_i|pc\(6) & (!\regs_i|Add2~11\ & VCC))
-- \regs_i|Add2~13\ = CARRY((\regs_i|pc\(6) & !\regs_i|Add2~11\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|pc\(6),
	datad => VCC,
	cin => \regs_i|Add2~11\,
	combout => \regs_i|Add2~12_combout\,
	cout => \regs_i|Add2~13\);

-- Location: LCCOMB_X26_Y14_N8
\regs_i|pc~12\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~12_combout\ = (\regs_i|pc[7]~3_combout\ & (((\regs_i|pc[7]~1_combout\)))) # (!\regs_i|pc[7]~3_combout\ & ((\regs_i|pc[7]~1_combout\ & ((\regs_i|Add2~12_combout\))) # (!\regs_i|pc[7]~1_combout\ & (\regs_i|Add0~12_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010010100100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|pc[7]~3_combout\,
	datab => \regs_i|Add0~12_combout\,
	datac => \regs_i|pc[7]~1_combout\,
	datad => \regs_i|Add2~12_combout\,
	combout => \regs_i|pc~12_combout\);

-- Location: LCCOMB_X26_Y14_N6
\regs_i|pc~13\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~13_combout\ = (\regs_i|pc[7]~3_combout\ & ((\regs_i|pc~12_combout\ & (\regs_i|u_key|val\(2))) # (!\regs_i|pc~12_combout\ & ((\regs_i|data[6]~4_combout\))))) # (!\regs_i|pc[7]~3_combout\ & (((\regs_i|pc~12_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101101011010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|pc[7]~3_combout\,
	datab => \regs_i|u_key|val\(2),
	datac => \regs_i|pc~12_combout\,
	datad => \regs_i|data[6]~4_combout\,
	combout => \regs_i|pc~13_combout\);

-- Location: LCCOMB_X26_Y14_N30
\regs_i|pc~14\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~14_combout\ = (\regs_i|pc~13_combout\ & ((\m[1]~input_o\) # ((\m[0]~input_o\) # (\regs_i|page~q\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \m[1]~input_o\,
	datab => \m[0]~input_o\,
	datac => \regs_i|page~q\,
	datad => \regs_i|pc~13_combout\,
	combout => \regs_i|pc~14_combout\);

-- Location: FF_X26_Y14_N31
\regs_i|pc[6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|pc~14_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|pc[7]~11_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|pc\(6));

-- Location: LCCOMB_X27_Y14_N20
\regs_i|Add2~14\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add2~14_combout\ = \regs_i|Add2~13\ $ (\regs_i|pc\(7))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000111111110000",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datad => \regs_i|pc\(7),
	cin => \regs_i|Add2~13\,
	combout => \regs_i|Add2~14_combout\);

-- Location: LCCOMB_X27_Y14_N24
\regs_i|pc~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~4_combout\ = (\regs_i|pc[7]~3_combout\ & (\regs_i|u_key|val\(3))) # (!\regs_i|pc[7]~3_combout\ & ((\regs_i|Add2~14_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001111000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|pc[7]~3_combout\,
	datac => \regs_i|u_key|val\(3),
	datad => \regs_i|Add2~14_combout\,
	combout => \regs_i|pc~4_combout\);

-- Location: LCCOMB_X27_Y17_N4
\regs_i|pc~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~2_combout\ = (\m[0]~input_o\) # ((\regs_i|page~q\) # (\m[1]~input_o\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111111111010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \m[0]~input_o\,
	datac => \regs_i|page~q\,
	datad => \m[1]~input_o\,
	combout => \regs_i|pc~2_combout\);

-- Location: LCCOMB_X27_Y13_N26
\regs_i|Add0~14\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|Add0~14_combout\ = \regs_i|Add0~13\ $ (!\regs_i|pc\(7))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000001111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datad => \regs_i|pc\(7),
	cin => \regs_i|Add0~13\,
	combout => \regs_i|Add0~14_combout\);

-- Location: LCCOMB_X27_Y17_N2
\regs_i|pc~5\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~5_combout\ = (\regs_i|pc[7]~3_combout\ & ((\regs_i|data[7]~6_combout\))) # (!\regs_i|pc[7]~3_combout\ & (\regs_i|Add0~14_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110000001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|Add0~14_combout\,
	datac => \regs_i|pc[7]~3_combout\,
	datad => \regs_i|data[7]~6_combout\,
	combout => \regs_i|pc~5_combout\);

-- Location: LCCOMB_X27_Y17_N26
\regs_i|pc~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|pc~6_combout\ = (\regs_i|pc~2_combout\ & ((\regs_i|pc[7]~1_combout\ & (\regs_i|pc~4_combout\)) # (!\regs_i|pc[7]~1_combout\ & ((\regs_i|pc~5_combout\)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011000010000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|pc~4_combout\,
	datab => \regs_i|pc[7]~1_combout\,
	datac => \regs_i|pc~2_combout\,
	datad => \regs_i|pc~5_combout\,
	combout => \regs_i|pc~6_combout\);

-- Location: FF_X27_Y17_N27
\regs_i|pc[7]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|pc~6_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|pc[7]~11_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|pc\(7));

-- Location: LCCOMB_X26_Y17_N24
\regs_i|r[2][7]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[2][7]~feeder_combout\ = \regs_i|r~0_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \regs_i|r~0_combout\,
	combout => \regs_i|r[2][7]~feeder_combout\);

-- Location: FF_X26_Y17_N25
\regs_i|r[2][7]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|r[2][7]~feeder_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|r[2][7]~6_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[2][7]~q\);

-- Location: FF_X27_Y17_N29
\regs_i|r[3][7]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|r~0_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|r[3][4]~10_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[3][7]~q\);

-- Location: LCCOMB_X28_Y17_N22
\regs_i|r[1][7]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r[1][7]~feeder_combout\ = \regs_i|r~0_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \regs_i|r~0_combout\,
	combout => \regs_i|r[1][7]~feeder_combout\);

-- Location: FF_X28_Y17_N23
\regs_i|r[1][7]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|r[1][7]~feeder_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|r[1][4]~4_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[1][7]~q\);

-- Location: LCCOMB_X25_Y17_N0
\regs_i|y~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|y~0_combout\ = (\remain[1]~input_o\ & (\remain[0]~input_o\)) # (!\remain[1]~input_o\ & ((\remain[0]~input_o\ & ((\regs_i|r[1][7]~q\))) # (!\remain[0]~input_o\ & (\regs_i|r[0][7]~q\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110010011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \remain[1]~input_o\,
	datab => \remain[0]~input_o\,
	datac => \regs_i|r[0][7]~q\,
	datad => \regs_i|r[1][7]~q\,
	combout => \regs_i|y~0_combout\);

-- Location: LCCOMB_X26_Y17_N22
\regs_i|y~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|y~1_combout\ = (\remain[1]~input_o\ & ((\regs_i|y~0_combout\ & ((\regs_i|r[3][7]~q\))) # (!\regs_i|y~0_combout\ & (\regs_i|r[2][7]~q\)))) # (!\remain[1]~input_o\ & (((\regs_i|y~0_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010110001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \remain[1]~input_o\,
	datab => \regs_i|r[2][7]~q\,
	datac => \regs_i|r[3][7]~q\,
	datad => \regs_i|y~0_combout\,
	combout => \regs_i|y~1_combout\);

-- Location: LCCOMB_X29_Y16_N6
\regs_i|y~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|y~2_combout\ = (\remain[2]~input_o\ & (\regs_i|pc\(7))) # (!\remain[2]~input_o\ & ((\regs_i|y~1_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100111111000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|pc\(7),
	datac => \remain[2]~input_o\,
	datad => \regs_i|y~1_combout\,
	combout => \regs_i|y~2_combout\);

-- Location: FF_X29_Y16_N7
\regs_i|y[7]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|y~2_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|y\(7));

-- Location: LCCOMB_X27_Y17_N30
\regs_i|data[7]~56\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[7]~56_combout\ = (!\rd~input_o\ & (\key_sel[0]~input_o\ & ((\regs_i|x\(7)) # (\regs_i|y\(7)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011000000100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|x\(7),
	datab => \rd~input_o\,
	datac => \key_sel[0]~input_o\,
	datad => \regs_i|y\(7),
	combout => \regs_i|data[7]~56_combout\);

-- Location: LCCOMB_X27_Y17_N12
\regs_i|data[7]~46\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[7]~46_combout\ = (\key_sel[0]~input_o\ & (\regs_i|x\(7) $ (((!\rd~input_o\ & \regs_i|y\(7)))))) # (!\key_sel[0]~input_o\ & ((\rd~input_o\) # ((\regs_i|x\(7) & \regs_i|y\(7)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001111010101100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|x\(7),
	datab => \rd~input_o\,
	datac => \key_sel[0]~input_o\,
	datad => \regs_i|y\(7),
	combout => \regs_i|data[7]~46_combout\);

-- Location: LCCOMB_X27_Y17_N6
\regs_i|data[7]~47\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[7]~47_combout\ = (\regs_i|data[7]~46_combout\ & ((\key_sel[0]~input_o\) # ((\regs_i|x\(6)) # (!\rd~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010101010001010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|data[7]~46_combout\,
	datab => \key_sel[0]~input_o\,
	datac => \rd~input_o\,
	datad => \regs_i|x\(6),
	combout => \regs_i|data[7]~47_combout\);

-- Location: LCCOMB_X27_Y17_N20
\regs_i|data[7]~57\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[7]~57_combout\ = (\key_sel[1]~input_o\ & (((\regs_i|data[7]~47_combout\)))) # (!\key_sel[1]~input_o\ & (!\key_sel[0]~input_o\ & (\rd~input_o\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011101000010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \key_sel[1]~input_o\,
	datab => \key_sel[0]~input_o\,
	datac => \rd~input_o\,
	datad => \regs_i|data[7]~47_combout\,
	combout => \regs_i|data[7]~57_combout\);

-- Location: LCCOMB_X28_Y16_N26
\alu_i|Add0~14\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Add0~14_combout\ = (\regs_i|y\(7) & ((\regs_i|x\(7) & (\alu_i|Add0~13\ & VCC)) # (!\regs_i|x\(7) & (!\alu_i|Add0~13\)))) # (!\regs_i|y\(7) & ((\regs_i|x\(7) & (!\alu_i|Add0~13\)) # (!\regs_i|x\(7) & ((\alu_i|Add0~13\) # (GND)))))
-- \alu_i|Add0~15\ = CARRY((\regs_i|y\(7) & (!\regs_i|x\(7) & !\alu_i|Add0~13\)) # (!\regs_i|y\(7) & ((!\alu_i|Add0~13\) # (!\regs_i|x\(7)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001011000010111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|y\(7),
	datab => \regs_i|x\(7),
	datad => VCC,
	cin => \alu_i|Add0~13\,
	combout => \alu_i|Add0~14_combout\,
	cout => \alu_i|Add0~15\);

-- Location: LCCOMB_X27_Y16_N20
\alu_i|Add1~14\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Add1~14_combout\ = (\alu_i|Add0~14_combout\ & (\alu_i|Add1~13\ & VCC)) # (!\alu_i|Add0~14_combout\ & (!\alu_i|Add1~13\))
-- \alu_i|Add1~15\ = CARRY((!\alu_i|Add0~14_combout\ & !\alu_i|Add1~13\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010010100000101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => \alu_i|Add0~14_combout\,
	datad => VCC,
	cin => \alu_i|Add1~13\,
	combout => \alu_i|Add1~14_combout\,
	cout => \alu_i|Add1~15\);

-- Location: LCCOMB_X27_Y17_N24
\regs_i|data[7]~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[7]~6_combout\ = (\key_sel[1]~input_o\ & (((\regs_i|data[7]~57_combout\)))) # (!\key_sel[1]~input_o\ & ((\regs_i|data[7]~56_combout\) # ((\regs_i|data[7]~57_combout\ & \alu_i|Add1~14_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100111011001010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|data[7]~56_combout\,
	datab => \regs_i|data[7]~57_combout\,
	datac => \key_sel[1]~input_o\,
	datad => \alu_i|Add1~14_combout\,
	combout => \regs_i|data[7]~6_combout\);

-- Location: LCCOMB_X27_Y17_N28
\regs_i|r~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|r~0_combout\ = (\regs_i|page~q\ & ((\regs_i|data[7]~6_combout\))) # (!\regs_i|page~q\ & (\regs_i|u_key|val\(3)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110000001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|u_key|val\(3),
	datac => \regs_i|page~q\,
	datad => \regs_i|data[7]~6_combout\,
	combout => \regs_i|r~0_combout\);

-- Location: FF_X25_Y17_N1
\regs_i|r[0][7]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	asdata => \regs_i|r~0_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => VCC,
	ena => \regs_i|r[0][4]~8_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|r[0][7]~q\);

-- Location: LCCOMB_X25_Y17_N6
\regs_i|x~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|x~0_combout\ = (\m[0]~input_o\ & (((\remain[3]~input_o\) # (\regs_i|r[2][7]~q\)))) # (!\m[0]~input_o\ & (\regs_i|r[0][7]~q\ & (!\remain[3]~input_o\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010111010100100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \m[0]~input_o\,
	datab => \regs_i|r[0][7]~q\,
	datac => \remain[3]~input_o\,
	datad => \regs_i|r[2][7]~q\,
	combout => \regs_i|x~0_combout\);

-- Location: LCCOMB_X25_Y17_N4
\regs_i|x~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|x~1_combout\ = (\regs_i|x~0_combout\ & (((\regs_i|r[3][7]~q\)) # (!\remain[3]~input_o\))) # (!\regs_i|x~0_combout\ & (\remain[3]~input_o\ & ((\regs_i|r[1][7]~q\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110011010100010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|x~0_combout\,
	datab => \remain[3]~input_o\,
	datac => \regs_i|r[3][7]~q\,
	datad => \regs_i|r[1][7]~q\,
	combout => \regs_i|x~1_combout\);

-- Location: LCCOMB_X28_Y14_N0
\regs_i|x[7]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|x[7]~feeder_combout\ = \regs_i|x~1_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \regs_i|x~1_combout\,
	combout => \regs_i|x[7]~feeder_combout\);

-- Location: FF_X28_Y14_N1
\regs_i|x[7]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|x[7]~feeder_combout\,
	asdata => \regs_i|pc\(7),
	clrn => \rst~inputclkctrl_outclk\,
	sload => \m[1]~input_o\,
	ena => \regs_i|page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|x\(7));

-- Location: LCCOMB_X28_Y16_N28
\alu_i|Add0~16\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Add0~16_combout\ = \regs_i|x\(7) $ (\alu_i|Add0~15\ $ (!\regs_i|y\(7)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110011000011",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|x\(7),
	datad => \regs_i|y\(7),
	cin => \alu_i|Add0~15\,
	combout => \alu_i|Add0~16_combout\);

-- Location: LCCOMB_X27_Y16_N22
\alu_i|Add1~16\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|Add1~16_combout\ = \alu_i|Add1~15\ $ (\alu_i|Add0~16_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000111111110000",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datad => \alu_i|Add0~16_combout\,
	cin => \alu_i|Add1~15\,
	combout => \alu_i|Add1~16_combout\);

-- Location: LCCOMB_X27_Y17_N18
\alu_i|overflow~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|overflow~2_combout\ = (\alu_i|Add1~16_combout\ & ((\alu_i|Add0~14_combout\ $ (\alu_i|Add0~16_combout\)) # (!\alu_i|Add1~14_combout\))) # (!\alu_i|Add1~16_combout\ & ((\alu_i|Add1~14_combout\) # (\alu_i|Add0~14_combout\ $ 
-- (\alu_i|Add0~16_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0111110110111110",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \alu_i|Add1~16_combout\,
	datab => \alu_i|Add0~14_combout\,
	datac => \alu_i|Add0~16_combout\,
	datad => \alu_i|Add1~14_combout\,
	combout => \alu_i|overflow~2_combout\);

-- Location: LCCOMB_X27_Y17_N8
\alu_i|overflow~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \alu_i|overflow~3_combout\ = (!\key_sel[1]~input_o\ & (!\key_sel[0]~input_o\ & (\rd~input_o\ & \alu_i|overflow~2_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0001000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \key_sel[1]~input_o\,
	datab => \key_sel[0]~input_o\,
	datac => \rd~input_o\,
	datad => \alu_i|overflow~2_combout\,
	combout => \alu_i|overflow~3_combout\);

-- Location: LCCOMB_X29_Y14_N16
\regs_i|u_key|Decoder0~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_key|Decoder0~0_combout\ = (\regs_i|u_display|sel\(1)) # (\regs_i|u_display|sel\(0))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111110101010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|sel\(1),
	datad => \regs_i|u_display|sel\(0),
	combout => \regs_i|u_key|Decoder0~0_combout\);

-- Location: LCCOMB_X29_Y14_N2
\regs_i|u_key|Decoder0~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_key|Decoder0~1_combout\ = (!\regs_i|u_display|sel\(1) & \regs_i|u_display|sel\(0))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101010100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|sel\(1),
	datad => \regs_i|u_display|sel\(0),
	combout => \regs_i|u_key|Decoder0~1_combout\);

-- Location: LCCOMB_X29_Y14_N20
\regs_i|u_key|Decoder0~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_key|Decoder0~2_combout\ = (\regs_i|u_display|sel\(1) & !\regs_i|u_display|sel\(0))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000010101010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|sel\(1),
	datad => \regs_i|u_display|sel\(0),
	combout => \regs_i|u_key|Decoder0~2_combout\);

-- Location: LCCOMB_X30_Y14_N0
\regs_i|u_key|Decoder0~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_key|Decoder0~3_combout\ = (\regs_i|u_display|sel\(0) & \regs_i|u_display|sel\(1))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010000010100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|sel\(0),
	datac => \regs_i|u_display|sel\(1),
	combout => \regs_i|u_key|Decoder0~3_combout\);

-- Location: LCCOMB_X30_Y16_N26
\regs_i|en[2]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|en[2]~feeder_combout\ = VCC

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111111111111",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	combout => \regs_i|en[2]~feeder_combout\);

-- Location: FF_X30_Y16_N27
\regs_i|en[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|en[2]~feeder_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|en\(2));

-- Location: LCCOMB_X30_Y16_N18
\regs_i|u_display|sel[2]~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|sel[2]~1_combout\ = \regs_i|u_display|sel\(2) $ (((\regs_i|u_display|sel\(0) & \regs_i|u_display|sel\(1))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0111100001111000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|sel\(0),
	datab => \regs_i|u_display|sel\(1),
	datac => \regs_i|u_display|sel\(2),
	combout => \regs_i|u_display|sel[2]~1_combout\);

-- Location: FF_X30_Y16_N19
\regs_i|u_display|sel[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|u_display|sel[2]~1_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|u_display|sel\(2));

-- Location: FF_X30_Y16_N25
\regs_i|en[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	asdata => \regs_i|page~q\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|en\(1));

-- Location: LCCOMB_X30_Y16_N24
\regs_i|u_display|Mux4~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|Mux4~0_combout\ = (\regs_i|u_display|sel\(1) & (\regs_i|en\(2))) # (!\regs_i|u_display|sel\(1) & (((!\regs_i|u_display|sel\(2) & \regs_i|en\(1)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010101000110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|en\(2),
	datab => \regs_i|u_display|sel\(2),
	datac => \regs_i|en\(1),
	datad => \regs_i|u_display|sel\(1),
	combout => \regs_i|u_display|Mux4~0_combout\);

-- Location: LCCOMB_X28_Y14_N10
\regs_i|data~33\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data~33_combout\ = (\regs_i|page~q\ & (\regs_i|y\(5))) # (!\regs_i|page~q\ & ((\regs_i|pc\(5))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|page~q\,
	datac => \regs_i|y\(5),
	datad => \regs_i|pc\(5),
	combout => \regs_i|data~33_combout\);

-- Location: FF_X28_Y14_N11
\regs_i|data[21]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|data~33_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|data\(21));

-- Location: FF_X29_Y14_N23
\regs_i|data[29]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	asdata => \regs_i|x\(5),
	clrn => \rst~inputclkctrl_outclk\,
	sload => VCC,
	ena => \regs_i|page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|data\(29));

-- Location: LCCOMB_X29_Y14_N22
\regs_i|u_display|Mux2~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|Mux2~1_combout\ = (\regs_i|u_display|sel\(0) & (((\regs_i|u_display|sel\(1))))) # (!\regs_i|u_display|sel\(0) & ((\regs_i|u_display|sel\(1) & (\regs_i|data\(21))) # (!\regs_i|u_display|sel\(1) & ((\regs_i|data\(29))))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110111000110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|data\(21),
	datab => \regs_i|u_display|sel\(0),
	datac => \regs_i|data\(29),
	datad => \regs_i|u_display|sel\(1),
	combout => \regs_i|u_display|Mux2~1_combout\);

-- Location: FF_X29_Y14_N25
\regs_i|data[25]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	asdata => \regs_i|x\(1),
	clrn => \rst~inputclkctrl_outclk\,
	sload => VCC,
	ena => \regs_i|page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|data\(25));

-- Location: LCCOMB_X29_Y14_N12
\regs_i|data~34\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data~34_combout\ = (\regs_i|page~q\ & (\regs_i|y\(1))) # (!\regs_i|page~q\ & ((\regs_i|pc\(1))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100110011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|y\(1),
	datac => \regs_i|pc\(1),
	datad => \regs_i|page~q\,
	combout => \regs_i|data~34_combout\);

-- Location: FF_X29_Y14_N13
\regs_i|data[17]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|data~34_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|data\(17));

-- Location: LCCOMB_X29_Y14_N24
\regs_i|u_display|Mux2~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|Mux2~2_combout\ = (\regs_i|u_display|Mux2~1_combout\ & (((\regs_i|data\(17))) # (!\regs_i|u_display|sel\(0)))) # (!\regs_i|u_display|Mux2~1_combout\ & (\regs_i|u_display|sel\(0) & (\regs_i|data\(25))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110101001100010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|Mux2~1_combout\,
	datab => \regs_i|u_display|sel\(0),
	datac => \regs_i|data\(25),
	datad => \regs_i|data\(17),
	combout => \regs_i|u_display|Mux2~2_combout\);

-- Location: LCCOMB_X25_Y15_N16
\regs_i|data~26\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data~26_combout\ = (\ra[1]~input_o\ & (((\regs_i|r[2][1]~q\) # (\ra[0]~input_o\)))) # (!\ra[1]~input_o\ & (\regs_i|r[0][1]~q\ & ((!\ra[0]~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100110011100010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|r[0][1]~q\,
	datab => \ra[1]~input_o\,
	datac => \regs_i|r[2][1]~q\,
	datad => \ra[0]~input_o\,
	combout => \regs_i|data~26_combout\);

-- Location: LCCOMB_X26_Y15_N6
\regs_i|data~27\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data~27_combout\ = (\regs_i|data~26_combout\ & (((\regs_i|r[3][1]~q\) # (!\ra[0]~input_o\)))) # (!\regs_i|data~26_combout\ & (\regs_i|r[1][1]~q\ & ((\ra[0]~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100101011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|r[1][1]~q\,
	datab => \regs_i|r[3][1]~q\,
	datac => \regs_i|data~26_combout\,
	datad => \ra[0]~input_o\,
	combout => \regs_i|data~27_combout\);

-- Location: FF_X28_Y15_N29
\regs_i|data[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|data[1]~3_combout\,
	asdata => \regs_i|data~27_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => \regs_i|ALT_INV_page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|data\(1));

-- Location: LCCOMB_X26_Y16_N16
\regs_i|data[5]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[5]~feeder_combout\ = \regs_i|data[5]~2_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \regs_i|data[5]~2_combout\,
	combout => \regs_i|data[5]~feeder_combout\);

-- Location: LCCOMB_X25_Y17_N20
\regs_i|data~31\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data~31_combout\ = (\ra[1]~input_o\ & (((\ra[0]~input_o\)))) # (!\ra[1]~input_o\ & ((\ra[0]~input_o\ & ((\regs_i|r[1][5]~q\))) # (!\ra[0]~input_o\ & (\regs_i|r[0][5]~q\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111101001000100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ra[1]~input_o\,
	datab => \regs_i|r[0][5]~q\,
	datac => \regs_i|r[1][5]~q\,
	datad => \ra[0]~input_o\,
	combout => \regs_i|data~31_combout\);

-- Location: LCCOMB_X26_Y17_N28
\regs_i|data~32\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data~32_combout\ = (\ra[1]~input_o\ & ((\regs_i|data~31_combout\ & (\regs_i|r[3][5]~q\)) # (!\regs_i|data~31_combout\ & ((\regs_i|r[2][5]~q\))))) # (!\ra[1]~input_o\ & (\regs_i|data~31_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110011011000100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ra[1]~input_o\,
	datab => \regs_i|data~31_combout\,
	datac => \regs_i|r[3][5]~q\,
	datad => \regs_i|r[2][5]~q\,
	combout => \regs_i|data~32_combout\);

-- Location: FF_X26_Y16_N17
\regs_i|data[5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|data[5]~feeder_combout\,
	asdata => \regs_i|data~32_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => \regs_i|ALT_INV_page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|data\(5));

-- Location: LCCOMB_X29_Y14_N26
\regs_i|u_display|Mux2~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|Mux2~0_combout\ = (\regs_i|u_display|sel\(0) & (\regs_i|data\(1))) # (!\regs_i|u_display|sel\(0) & ((\regs_i|data\(5))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100110011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|data\(1),
	datac => \regs_i|data\(5),
	datad => \regs_i|u_display|sel\(0),
	combout => \regs_i|u_display|Mux2~0_combout\);

-- Location: LCCOMB_X29_Y14_N14
\regs_i|u_display|Mux2~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|Mux2~3_combout\ = (\regs_i|u_display|sel\(2) & (((\regs_i|u_display|Mux2~0_combout\ & \regs_i|u_display|sel\(1))))) # (!\regs_i|u_display|sel\(2) & (\regs_i|u_display|Mux2~2_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110010001000100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|sel\(2),
	datab => \regs_i|u_display|Mux2~2_combout\,
	datac => \regs_i|u_display|Mux2~0_combout\,
	datad => \regs_i|u_display|sel\(1),
	combout => \regs_i|u_display|Mux2~3_combout\);

-- Location: LCCOMB_X28_Y17_N0
\regs_i|data[7]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[7]~feeder_combout\ = \regs_i|data[7]~6_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \regs_i|data[7]~6_combout\,
	combout => \regs_i|data[7]~feeder_combout\);

-- Location: LCCOMB_X25_Y17_N16
\regs_i|data~48\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data~48_combout\ = (\ra[0]~input_o\ & (((\ra[1]~input_o\) # (\regs_i|r[1][7]~q\)))) # (!\ra[0]~input_o\ & (\regs_i|r[0][7]~q\ & (!\ra[1]~input_o\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010111010100100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ra[0]~input_o\,
	datab => \regs_i|r[0][7]~q\,
	datac => \ra[1]~input_o\,
	datad => \regs_i|r[1][7]~q\,
	combout => \regs_i|data~48_combout\);

-- Location: LCCOMB_X25_Y17_N26
\regs_i|data~49\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data~49_combout\ = (\ra[1]~input_o\ & ((\regs_i|data~48_combout\ & ((\regs_i|r[3][7]~q\))) # (!\regs_i|data~48_combout\ & (\regs_i|r[2][7]~q\)))) # (!\ra[1]~input_o\ & (((\regs_i|data~48_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010110001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ra[1]~input_o\,
	datab => \regs_i|r[2][7]~q\,
	datac => \regs_i|r[3][7]~q\,
	datad => \regs_i|data~48_combout\,
	combout => \regs_i|data~49_combout\);

-- Location: FF_X28_Y17_N1
\regs_i|data[7]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|data[7]~feeder_combout\,
	asdata => \regs_i|data~49_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => \regs_i|ALT_INV_page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|data\(7));

-- Location: LCCOMB_X25_Y15_N4
\regs_i|data~44\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data~44_combout\ = (\ra[1]~input_o\ & ((\regs_i|r[2][3]~q\) # ((\ra[0]~input_o\)))) # (!\ra[1]~input_o\ & (((\regs_i|r[0][3]~q\ & !\ra[0]~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100110010111000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|r[2][3]~q\,
	datab => \ra[1]~input_o\,
	datac => \regs_i|r[0][3]~q\,
	datad => \ra[0]~input_o\,
	combout => \regs_i|data~44_combout\);

-- Location: LCCOMB_X26_Y15_N18
\regs_i|data~45\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data~45_combout\ = (\regs_i|data~44_combout\ & ((\regs_i|r[3][3]~q\) # ((!\ra[0]~input_o\)))) # (!\regs_i|data~44_combout\ & (((\regs_i|r[1][3]~q\ & \ra[0]~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010110011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|r[3][3]~q\,
	datab => \regs_i|r[1][3]~q\,
	datac => \regs_i|data~44_combout\,
	datad => \ra[0]~input_o\,
	combout => \regs_i|data~45_combout\);

-- Location: FF_X27_Y16_N25
\regs_i|data[3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|data[3]~7_combout\,
	asdata => \regs_i|data~45_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => \regs_i|ALT_INV_page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|data\(3));

-- Location: LCCOMB_X30_Y16_N22
\regs_i|u_display|Mux0~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|Mux0~0_combout\ = (\regs_i|u_display|sel\(0) & ((\regs_i|data\(3)))) # (!\regs_i|u_display|sel\(0) & (\regs_i|data\(7)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111101001010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|sel\(0),
	datac => \regs_i|data\(7),
	datad => \regs_i|data\(3),
	combout => \regs_i|u_display|Mux0~0_combout\);

-- Location: LCCOMB_X29_Y16_N24
\regs_i|data~51\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data~51_combout\ = (\regs_i|page~q\ & (\regs_i|y\(3))) # (!\regs_i|page~q\ & ((\regs_i|pc\(3))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001111000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|page~q\,
	datac => \regs_i|y\(3),
	datad => \regs_i|pc\(3),
	combout => \regs_i|data~51_combout\);

-- Location: FF_X29_Y16_N25
\regs_i|data[19]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|data~51_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|data\(19));

-- Location: FF_X30_Y16_N9
\regs_i|data[27]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	asdata => \regs_i|x\(3),
	clrn => \rst~inputclkctrl_outclk\,
	sload => VCC,
	ena => \regs_i|page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|data\(27));

-- Location: FF_X30_Y16_N11
\regs_i|data[31]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	asdata => \regs_i|x\(7),
	clrn => \rst~inputclkctrl_outclk\,
	sload => VCC,
	ena => \regs_i|page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|data\(31));

-- Location: LCCOMB_X29_Y16_N14
\regs_i|data~50\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data~50_combout\ = (\regs_i|page~q\ & (\regs_i|y\(7))) # (!\regs_i|page~q\ & ((\regs_i|pc\(7))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010101011001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|y\(7),
	datab => \regs_i|pc\(7),
	datad => \regs_i|page~q\,
	combout => \regs_i|data~50_combout\);

-- Location: FF_X29_Y16_N15
\regs_i|data[23]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|data~50_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|data\(23));

-- Location: LCCOMB_X30_Y16_N10
\regs_i|u_display|Mux0~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|Mux0~1_combout\ = (\regs_i|u_display|sel\(0) & (\regs_i|u_display|sel\(1))) # (!\regs_i|u_display|sel\(0) & ((\regs_i|u_display|sel\(1) & ((\regs_i|data\(23)))) # (!\regs_i|u_display|sel\(1) & (\regs_i|data\(31)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110010011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|sel\(0),
	datab => \regs_i|u_display|sel\(1),
	datac => \regs_i|data\(31),
	datad => \regs_i|data\(23),
	combout => \regs_i|u_display|Mux0~1_combout\);

-- Location: LCCOMB_X30_Y16_N8
\regs_i|u_display|Mux0~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|Mux0~2_combout\ = (\regs_i|u_display|sel\(0) & ((\regs_i|u_display|Mux0~1_combout\ & (\regs_i|data\(19))) # (!\regs_i|u_display|Mux0~1_combout\ & ((\regs_i|data\(27)))))) # (!\regs_i|u_display|sel\(0) & 
-- (((\regs_i|u_display|Mux0~1_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|sel\(0),
	datab => \regs_i|data\(19),
	datac => \regs_i|data\(27),
	datad => \regs_i|u_display|Mux0~1_combout\,
	combout => \regs_i|u_display|Mux0~2_combout\);

-- Location: LCCOMB_X30_Y16_N12
\regs_i|u_display|Mux0~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|Mux0~3_combout\ = (\regs_i|u_display|sel\(2) & (\regs_i|u_display|Mux0~0_combout\ & ((\regs_i|u_display|sel\(1))))) # (!\regs_i|u_display|sel\(2) & (((\regs_i|u_display|Mux0~2_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011100000110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|Mux0~0_combout\,
	datab => \regs_i|u_display|sel\(2),
	datac => \regs_i|u_display|Mux0~2_combout\,
	datad => \regs_i|u_display|sel\(1),
	combout => \regs_i|u_display|Mux0~3_combout\);

-- Location: LCCOMB_X26_Y14_N0
\regs_i|data[6]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[6]~feeder_combout\ = \regs_i|data[6]~4_combout\

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \regs_i|data[6]~4_combout\,
	combout => \regs_i|data[6]~feeder_combout\);

-- Location: LCCOMB_X25_Y17_N10
\regs_i|data~40\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data~40_combout\ = (\ra[1]~input_o\ & (((\ra[0]~input_o\)))) # (!\ra[1]~input_o\ & ((\ra[0]~input_o\ & ((\regs_i|r[1][6]~q\))) # (!\ra[0]~input_o\ & (\regs_i|r[0][6]~q\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111101001000100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ra[1]~input_o\,
	datab => \regs_i|r[0][6]~q\,
	datac => \regs_i|r[1][6]~q\,
	datad => \ra[0]~input_o\,
	combout => \regs_i|data~40_combout\);

-- Location: LCCOMB_X26_Y17_N18
\regs_i|data~41\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data~41_combout\ = (\ra[1]~input_o\ & ((\regs_i|data~40_combout\ & (\regs_i|r[3][6]~q\)) # (!\regs_i|data~40_combout\ & ((\regs_i|r[2][6]~q\))))) # (!\ra[1]~input_o\ & (((\regs_i|data~40_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ra[1]~input_o\,
	datab => \regs_i|r[3][6]~q\,
	datac => \regs_i|r[2][6]~q\,
	datad => \regs_i|data~40_combout\,
	combout => \regs_i|data~41_combout\);

-- Location: FF_X26_Y14_N1
\regs_i|data[6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|data[6]~feeder_combout\,
	asdata => \regs_i|data~41_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => \regs_i|ALT_INV_page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|data\(6));

-- Location: LCCOMB_X25_Y15_N30
\regs_i|data~35\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data~35_combout\ = (\ra[0]~input_o\ & (((\ra[1]~input_o\)))) # (!\ra[0]~input_o\ & ((\ra[1]~input_o\ & ((\regs_i|r[2][2]~q\))) # (!\ra[1]~input_o\ & (\regs_i|r[0][2]~q\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111101001000100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ra[0]~input_o\,
	datab => \regs_i|r[0][2]~q\,
	datac => \regs_i|r[2][2]~q\,
	datad => \ra[1]~input_o\,
	combout => \regs_i|data~35_combout\);

-- Location: LCCOMB_X26_Y15_N16
\regs_i|data~36\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data~36_combout\ = (\ra[0]~input_o\ & ((\regs_i|data~35_combout\ & ((\regs_i|r[3][2]~q\))) # (!\regs_i|data~35_combout\ & (\regs_i|r[1][2]~q\)))) # (!\ra[0]~input_o\ & (((\regs_i|data~35_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111100001011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ra[0]~input_o\,
	datab => \regs_i|r[1][2]~q\,
	datac => \regs_i|data~35_combout\,
	datad => \regs_i|r[3][2]~q\,
	combout => \regs_i|data~36_combout\);

-- Location: FF_X28_Y15_N27
\regs_i|data[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|data[2]~5_combout\,
	asdata => \regs_i|data~36_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => \regs_i|ALT_INV_page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|data\(2));

-- Location: LCCOMB_X29_Y15_N4
\regs_i|u_display|Mux1~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|Mux1~0_combout\ = (\regs_i|u_display|sel\(0) & ((\regs_i|data\(2)))) # (!\regs_i|u_display|sel\(0) & (\regs_i|data\(6)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000011001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|data\(6),
	datac => \regs_i|data\(2),
	datad => \regs_i|u_display|sel\(0),
	combout => \regs_i|u_display|Mux1~0_combout\);

-- Location: LCCOMB_X29_Y14_N0
\regs_i|data[26]~feeder\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data[26]~feeder_combout\ = \regs_i|x\(2)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datad => \regs_i|x\(2),
	combout => \regs_i|data[26]~feeder_combout\);

-- Location: FF_X29_Y14_N1
\regs_i|data[26]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|data[26]~feeder_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \regs_i|page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|data\(26));

-- Location: FF_X29_Y14_N11
\regs_i|data[30]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	asdata => \regs_i|x\(6),
	clrn => \rst~inputclkctrl_outclk\,
	sload => VCC,
	ena => \regs_i|page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|data\(30));

-- Location: LCCOMB_X29_Y14_N10
\regs_i|u_display|Mux1~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|Mux1~1_combout\ = (\regs_i|u_display|sel\(1) & (((\regs_i|u_display|sel\(0))))) # (!\regs_i|u_display|sel\(1) & ((\regs_i|u_display|sel\(0) & (\regs_i|data\(26))) # (!\regs_i|u_display|sel\(0) & ((\regs_i|data\(30))))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110111001010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|sel\(1),
	datab => \regs_i|data\(26),
	datac => \regs_i|data\(30),
	datad => \regs_i|u_display|sel\(0),
	combout => \regs_i|u_display|Mux1~1_combout\);

-- Location: LCCOMB_X28_Y14_N18
\regs_i|data~43\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data~43_combout\ = (\regs_i|page~q\ & ((\regs_i|y\(2)))) # (!\regs_i|page~q\ & (\regs_i|pc\(2)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111110000001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|pc\(2),
	datac => \regs_i|page~q\,
	datad => \regs_i|y\(2),
	combout => \regs_i|data~43_combout\);

-- Location: FF_X28_Y14_N19
\regs_i|data[18]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|data~43_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|data\(18));

-- Location: LCCOMB_X28_Y14_N4
\regs_i|data~42\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data~42_combout\ = (\regs_i|page~q\ & ((\regs_i|y\(6)))) # (!\regs_i|page~q\ & (\regs_i|pc\(6)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111101001010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|page~q\,
	datac => \regs_i|pc\(6),
	datad => \regs_i|y\(6),
	combout => \regs_i|data~42_combout\);

-- Location: FF_X28_Y14_N5
\regs_i|data[22]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|data~42_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|data\(22));

-- Location: LCCOMB_X29_Y14_N8
\regs_i|u_display|Mux1~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|Mux1~2_combout\ = (\regs_i|u_display|Mux1~1_combout\ & ((\regs_i|data\(18)) # ((!\regs_i|u_display|sel\(1))))) # (!\regs_i|u_display|Mux1~1_combout\ & (((\regs_i|data\(22) & \regs_i|u_display|sel\(1)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101100010101010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|Mux1~1_combout\,
	datab => \regs_i|data\(18),
	datac => \regs_i|data\(22),
	datad => \regs_i|u_display|sel\(1),
	combout => \regs_i|u_display|Mux1~2_combout\);

-- Location: LCCOMB_X29_Y18_N0
\regs_i|u_display|Mux1~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|Mux1~3_combout\ = (\regs_i|u_display|sel\(2) & (\regs_i|u_display|Mux1~0_combout\ & (\regs_i|u_display|sel\(1)))) # (!\regs_i|u_display|sel\(2) & (((\regs_i|u_display|Mux1~2_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1000111110000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|Mux1~0_combout\,
	datab => \regs_i|u_display|sel\(1),
	datac => \regs_i|u_display|sel\(2),
	datad => \regs_i|u_display|Mux1~2_combout\,
	combout => \regs_i|u_display|Mux1~3_combout\);

-- Location: LCCOMB_X29_Y16_N28
\regs_i|data~25\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data~25_combout\ = (\regs_i|page~q\ & ((\regs_i|y\(0)))) # (!\regs_i|page~q\ & (\regs_i|pc\(0)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000011001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|pc\(0),
	datac => \regs_i|y\(0),
	datad => \regs_i|page~q\,
	combout => \regs_i|data~25_combout\);

-- Location: FF_X29_Y16_N29
\regs_i|data[16]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|data~25_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|data\(16));

-- Location: FF_X30_Y16_N7
\regs_i|data[24]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	asdata => \regs_i|x\(0),
	clrn => \rst~inputclkctrl_outclk\,
	sload => VCC,
	ena => \regs_i|page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|data\(24));

-- Location: FF_X30_Y16_N29
\regs_i|data[28]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	asdata => \regs_i|x\(4),
	clrn => \rst~inputclkctrl_outclk\,
	sload => VCC,
	ena => \regs_i|page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|data\(28));

-- Location: LCCOMB_X29_Y16_N18
\regs_i|data~24\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data~24_combout\ = (\regs_i|page~q\ & (\regs_i|y\(4))) # (!\regs_i|page~q\ & ((\regs_i|pc\(4))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010101011001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|y\(4),
	datab => \regs_i|pc\(4),
	datad => \regs_i|page~q\,
	combout => \regs_i|data~24_combout\);

-- Location: FF_X29_Y16_N19
\regs_i|data[20]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|data~24_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|data\(20));

-- Location: LCCOMB_X30_Y16_N28
\regs_i|u_display|Mux3~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|Mux3~1_combout\ = (\regs_i|u_display|sel\(0) & (\regs_i|u_display|sel\(1))) # (!\regs_i|u_display|sel\(0) & ((\regs_i|u_display|sel\(1) & ((\regs_i|data\(20)))) # (!\regs_i|u_display|sel\(1) & (\regs_i|data\(28)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110010011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|sel\(0),
	datab => \regs_i|u_display|sel\(1),
	datac => \regs_i|data\(28),
	datad => \regs_i|data\(20),
	combout => \regs_i|u_display|Mux3~1_combout\);

-- Location: LCCOMB_X30_Y16_N6
\regs_i|u_display|Mux3~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|Mux3~2_combout\ = (\regs_i|u_display|sel\(0) & ((\regs_i|u_display|Mux3~1_combout\ & (\regs_i|data\(16))) # (!\regs_i|u_display|Mux3~1_combout\ & ((\regs_i|data\(24)))))) # (!\regs_i|u_display|sel\(0) & 
-- (((\regs_i|u_display|Mux3~1_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|sel\(0),
	datab => \regs_i|data\(16),
	datac => \regs_i|data\(24),
	datad => \regs_i|u_display|Mux3~1_combout\,
	combout => \regs_i|u_display|Mux3~2_combout\);

-- Location: LCCOMB_X25_Y15_N18
\regs_i|data~20\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data~20_combout\ = (\ra[0]~input_o\ & (\ra[1]~input_o\)) # (!\ra[0]~input_o\ & ((\ra[1]~input_o\ & (\regs_i|r[2][0]~q\)) # (!\ra[1]~input_o\ & ((\regs_i|r[0][0]~q\)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101100111001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ra[0]~input_o\,
	datab => \ra[1]~input_o\,
	datac => \regs_i|r[2][0]~q\,
	datad => \regs_i|r[0][0]~q\,
	combout => \regs_i|data~20_combout\);

-- Location: LCCOMB_X26_Y15_N4
\regs_i|data~21\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data~21_combout\ = (\regs_i|data~20_combout\ & ((\regs_i|r[3][0]~q\) # ((!\ra[0]~input_o\)))) # (!\regs_i|data~20_combout\ & (((\regs_i|r[1][0]~q\ & \ra[0]~input_o\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101100010101010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|data~20_combout\,
	datab => \regs_i|r[3][0]~q\,
	datac => \regs_i|r[1][0]~q\,
	datad => \ra[0]~input_o\,
	combout => \regs_i|data~21_combout\);

-- Location: FF_X26_Y16_N9
\regs_i|data[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|data[0]~1_combout\,
	asdata => \regs_i|data~21_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => \regs_i|ALT_INV_page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|data\(0));

-- Location: LCCOMB_X25_Y17_N24
\regs_i|data~22\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data~22_combout\ = (\ra[0]~input_o\ & ((\regs_i|r[1][4]~q\) # ((\ra[1]~input_o\)))) # (!\ra[0]~input_o\ & (((!\ra[1]~input_o\ & \regs_i|r[0][4]~q\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010110110101000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ra[0]~input_o\,
	datab => \regs_i|r[1][4]~q\,
	datac => \ra[1]~input_o\,
	datad => \regs_i|r[0][4]~q\,
	combout => \regs_i|data~22_combout\);

-- Location: LCCOMB_X25_Y17_N22
\regs_i|data~23\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|data~23_combout\ = (\ra[1]~input_o\ & ((\regs_i|data~22_combout\ & ((\regs_i|r[3][4]~q\))) # (!\regs_i|data~22_combout\ & (\regs_i|r[2][4]~q\)))) # (!\ra[1]~input_o\ & (((\regs_i|data~22_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111100001011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \ra[1]~input_o\,
	datab => \regs_i|r[2][4]~q\,
	datac => \regs_i|data~22_combout\,
	datad => \regs_i|r[3][4]~q\,
	combout => \regs_i|data~23_combout\);

-- Location: FF_X26_Y16_N19
\regs_i|data[4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \ALT_INV_clk~inputclkctrl_outclk\,
	d => \regs_i|data[4]~0_combout\,
	asdata => \regs_i|data~23_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => \regs_i|ALT_INV_page~q\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \regs_i|data\(4));

-- Location: LCCOMB_X30_Y16_N4
\regs_i|u_display|Mux3~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|Mux3~0_combout\ = (\regs_i|u_display|sel\(0) & (\regs_i|data\(0))) # (!\regs_i|u_display|sel\(0) & ((\regs_i|data\(4))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100111111000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|data\(0),
	datac => \regs_i|u_display|sel\(0),
	datad => \regs_i|data\(4),
	combout => \regs_i|u_display|Mux3~0_combout\);

-- Location: LCCOMB_X30_Y16_N20
\regs_i|u_display|Mux3~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|Mux3~3_combout\ = (\regs_i|u_display|sel\(2) & (((\regs_i|u_display|Mux3~0_combout\ & \regs_i|u_display|sel\(1))))) # (!\regs_i|u_display|sel\(2) & (\regs_i|u_display|Mux3~2_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110001000100010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|Mux3~2_combout\,
	datab => \regs_i|u_display|sel\(2),
	datac => \regs_i|u_display|Mux3~0_combout\,
	datad => \regs_i|u_display|sel\(1),
	combout => \regs_i|u_display|Mux3~3_combout\);

-- Location: LCCOMB_X30_Y23_N28
\regs_i|u_display|WideOr0~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|WideOr0~0_combout\ = (\regs_i|u_display|Mux3~3_combout\ & ((\regs_i|u_display|Mux0~3_combout\) # (\regs_i|u_display|Mux2~3_combout\ $ (\regs_i|u_display|Mux1~3_combout\)))) # (!\regs_i|u_display|Mux3~3_combout\ & 
-- ((\regs_i|u_display|Mux2~3_combout\) # (\regs_i|u_display|Mux0~3_combout\ $ (\regs_i|u_display|Mux1~3_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101111010111110",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|Mux2~3_combout\,
	datab => \regs_i|u_display|Mux0~3_combout\,
	datac => \regs_i|u_display|Mux1~3_combout\,
	datad => \regs_i|u_display|Mux3~3_combout\,
	combout => \regs_i|u_display|WideOr0~0_combout\);

-- Location: LCCOMB_X30_Y23_N18
\regs_i|u_display|seg[6]~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|seg[6]~0_combout\ = (\regs_i|u_display|Mux4~0_combout\ & \regs_i|u_display|WideOr0~0_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100110000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|u_display|Mux4~0_combout\,
	datad => \regs_i|u_display|WideOr0~0_combout\,
	combout => \regs_i|u_display|seg[6]~0_combout\);

-- Location: LCCOMB_X30_Y23_N24
\regs_i|u_display|WideOr1~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|WideOr1~0_combout\ = (\regs_i|u_display|Mux2~3_combout\ & (!\regs_i|u_display|Mux0~3_combout\ & ((\regs_i|u_display|Mux3~3_combout\) # (!\regs_i|u_display|Mux1~3_combout\)))) # (!\regs_i|u_display|Mux2~3_combout\ & 
-- (\regs_i|u_display|Mux3~3_combout\ & (\regs_i|u_display|Mux0~3_combout\ $ (!\regs_i|u_display|Mux1~3_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0110001100000010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|Mux2~3_combout\,
	datab => \regs_i|u_display|Mux0~3_combout\,
	datac => \regs_i|u_display|Mux1~3_combout\,
	datad => \regs_i|u_display|Mux3~3_combout\,
	combout => \regs_i|u_display|WideOr1~0_combout\);

-- Location: LCCOMB_X30_Y23_N2
\regs_i|u_display|seg[5]~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|seg[5]~1_combout\ = (\regs_i|u_display|Mux4~0_combout\ & !\regs_i|u_display|WideOr1~0_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000011001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|u_display|Mux4~0_combout\,
	datad => \regs_i|u_display|WideOr1~0_combout\,
	combout => \regs_i|u_display|seg[5]~1_combout\);

-- Location: LCCOMB_X30_Y23_N20
\regs_i|u_display|WideOr2~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|WideOr2~0_combout\ = (\regs_i|u_display|Mux2~3_combout\ & (!\regs_i|u_display|Mux0~3_combout\ & ((\regs_i|u_display|Mux3~3_combout\)))) # (!\regs_i|u_display|Mux2~3_combout\ & ((\regs_i|u_display|Mux1~3_combout\ & 
-- (!\regs_i|u_display|Mux0~3_combout\)) # (!\regs_i|u_display|Mux1~3_combout\ & ((\regs_i|u_display|Mux3~3_combout\)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011011100010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|Mux2~3_combout\,
	datab => \regs_i|u_display|Mux0~3_combout\,
	datac => \regs_i|u_display|Mux1~3_combout\,
	datad => \regs_i|u_display|Mux3~3_combout\,
	combout => \regs_i|u_display|WideOr2~0_combout\);

-- Location: LCCOMB_X30_Y23_N6
\regs_i|u_display|seg[4]~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|seg[4]~2_combout\ = (\regs_i|u_display|Mux4~0_combout\ & !\regs_i|u_display|WideOr2~0_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000011001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|u_display|Mux4~0_combout\,
	datad => \regs_i|u_display|WideOr2~0_combout\,
	combout => \regs_i|u_display|seg[4]~2_combout\);

-- Location: LCCOMB_X30_Y23_N0
\regs_i|u_display|WideOr3~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|WideOr3~0_combout\ = (\regs_i|u_display|Mux2~3_combout\ & ((\regs_i|u_display|Mux1~3_combout\ & ((\regs_i|u_display|Mux3~3_combout\))) # (!\regs_i|u_display|Mux1~3_combout\ & (\regs_i|u_display|Mux0~3_combout\ & 
-- !\regs_i|u_display|Mux3~3_combout\)))) # (!\regs_i|u_display|Mux2~3_combout\ & (!\regs_i|u_display|Mux0~3_combout\ & (\regs_i|u_display|Mux1~3_combout\ $ (\regs_i|u_display|Mux3~3_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010000100011000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|Mux2~3_combout\,
	datab => \regs_i|u_display|Mux0~3_combout\,
	datac => \regs_i|u_display|Mux1~3_combout\,
	datad => \regs_i|u_display|Mux3~3_combout\,
	combout => \regs_i|u_display|WideOr3~0_combout\);

-- Location: LCCOMB_X30_Y23_N10
\regs_i|u_display|seg[3]~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|seg[3]~3_combout\ = (\regs_i|u_display|Mux4~0_combout\ & !\regs_i|u_display|WideOr3~0_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000011001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|u_display|Mux4~0_combout\,
	datad => \regs_i|u_display|WideOr3~0_combout\,
	combout => \regs_i|u_display|seg[3]~3_combout\);

-- Location: LCCOMB_X30_Y23_N4
\regs_i|u_display|WideOr4~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|WideOr4~0_combout\ = (\regs_i|u_display|Mux0~3_combout\ & (\regs_i|u_display|Mux1~3_combout\ & ((\regs_i|u_display|Mux2~3_combout\) # (!\regs_i|u_display|Mux3~3_combout\)))) # (!\regs_i|u_display|Mux0~3_combout\ & 
-- (\regs_i|u_display|Mux2~3_combout\ & (!\regs_i|u_display|Mux1~3_combout\ & !\regs_i|u_display|Mux3~3_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1000000011000010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|Mux2~3_combout\,
	datab => \regs_i|u_display|Mux0~3_combout\,
	datac => \regs_i|u_display|Mux1~3_combout\,
	datad => \regs_i|u_display|Mux3~3_combout\,
	combout => \regs_i|u_display|WideOr4~0_combout\);

-- Location: LCCOMB_X30_Y23_N26
\regs_i|u_display|seg[2]~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|seg[2]~4_combout\ = (!\regs_i|u_display|WideOr4~0_combout\ & \regs_i|u_display|Mux4~0_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011001100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|u_display|WideOr4~0_combout\,
	datad => \regs_i|u_display|Mux4~0_combout\,
	combout => \regs_i|u_display|seg[2]~4_combout\);

-- Location: LCCOMB_X30_Y23_N12
\regs_i|u_display|WideOr5~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|WideOr5~0_combout\ = (\regs_i|u_display|Mux2~3_combout\ & ((\regs_i|u_display|Mux3~3_combout\ & (\regs_i|u_display|Mux0~3_combout\)) # (!\regs_i|u_display|Mux3~3_combout\ & ((\regs_i|u_display|Mux1~3_combout\))))) # 
-- (!\regs_i|u_display|Mux2~3_combout\ & (\regs_i|u_display|Mux1~3_combout\ & (\regs_i|u_display|Mux0~3_combout\ $ (\regs_i|u_display|Mux3~3_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001100011100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|Mux2~3_combout\,
	datab => \regs_i|u_display|Mux0~3_combout\,
	datac => \regs_i|u_display|Mux1~3_combout\,
	datad => \regs_i|u_display|Mux3~3_combout\,
	combout => \regs_i|u_display|WideOr5~0_combout\);

-- Location: LCCOMB_X30_Y23_N14
\regs_i|u_display|seg[1]~5\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|seg[1]~5_combout\ = (\regs_i|u_display|Mux4~0_combout\ & !\regs_i|u_display|WideOr5~0_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000011001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|u_display|Mux4~0_combout\,
	datad => \regs_i|u_display|WideOr5~0_combout\,
	combout => \regs_i|u_display|seg[1]~5_combout\);

-- Location: LCCOMB_X30_Y23_N16
\regs_i|u_display|WideOr6~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|WideOr6~0_combout\ = (\regs_i|u_display|Mux0~3_combout\ & (\regs_i|u_display|Mux3~3_combout\ & (\regs_i|u_display|Mux2~3_combout\ $ (\regs_i|u_display|Mux1~3_combout\)))) # (!\regs_i|u_display|Mux0~3_combout\ & 
-- (!\regs_i|u_display|Mux2~3_combout\ & (\regs_i|u_display|Mux1~3_combout\ $ (\regs_i|u_display|Mux3~3_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0100100100010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \regs_i|u_display|Mux2~3_combout\,
	datab => \regs_i|u_display|Mux0~3_combout\,
	datac => \regs_i|u_display|Mux1~3_combout\,
	datad => \regs_i|u_display|Mux3~3_combout\,
	combout => \regs_i|u_display|WideOr6~0_combout\);

-- Location: LCCOMB_X30_Y23_N30
\regs_i|u_display|seg[0]~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \regs_i|u_display|seg[0]~6_combout\ = (\regs_i|u_display|Mux4~0_combout\ & !\regs_i|u_display|WideOr6~0_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000011001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \regs_i|u_display|Mux4~0_combout\,
	datad => \regs_i|u_display|WideOr6~0_combout\,
	combout => \regs_i|u_display|seg[0]~6_combout\);

ww_overflow <= \overflow~output_o\;

ww_key_col(3) <= \key_col[3]~output_o\;

ww_key_col(2) <= \key_col[2]~output_o\;

ww_key_col(1) <= \key_col[1]~output_o\;

ww_key_col(0) <= \key_col[0]~output_o\;

ww_seg(7) <= \seg[7]~output_o\;

ww_seg(6) <= \seg[6]~output_o\;

ww_seg(5) <= \seg[5]~output_o\;

ww_seg(4) <= \seg[4]~output_o\;

ww_seg(3) <= \seg[3]~output_o\;

ww_seg(2) <= \seg[2]~output_o\;

ww_seg(1) <= \seg[1]~output_o\;

ww_seg(0) <= \seg[0]~output_o\;

ww_sel(2) <= \sel[2]~output_o\;

ww_sel(1) <= \sel[1]~output_o\;

ww_sel(0) <= \sel[0]~output_o\;
END structure;


